[llvm] r236609 - [ARM] Fast-Isel was incorrectly selecting <2 x double> adds.

Pete Cooper peter_cooper at apple.com
Wed May 6 09:39:17 PDT 2015


Author: pete
Date: Wed May  6 11:39:17 2015
New Revision: 236609

URL: http://llvm.org/viewvc/llvm-project?rev=236609&view=rev
Log:
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.

With neon enabled, we reach SelectBinaryFPOp and are able to get registers for a <2 x double> add.

However, we shouldn't actually attempt arithmetic on it as ARMIselLowering says "v2f64 is legal so that QR subregs can be extracted as f64 elements, but neither Neon nor VFP support any arithmetic operations on it."

This commit disables SelectBinaryFPOp for any vector types.  There's already a FIXME to try handle neon.  Doing so would require fixing this conditional which isn't safe for vectors 'VT == MVT::f64 || VT == MVT::i64'

Added:
    llvm/trunk/test/CodeGen/ARM/fast-isel-vaddd.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=236609&r1=236608&r2=236609&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed May  6 11:39:17 2015
@@ -1794,6 +1794,10 @@ bool ARMFastISel::SelectBinaryFPOp(const
   if (!FPVT.isSimple()) return false;
   MVT VT = FPVT.getSimpleVT();
 
+  // FIXME: Support vector types where possible.
+  if (VT.isVector())
+    return false;
+
   // We can get here in the case when we want to use NEON for our fp
   // operations, but can't figure out how to. Just use the vfp instructions
   // if we have them.

Added: llvm/trunk/test/CodeGen/ARM/fast-isel-vaddd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-vaddd.ll?rev=236609&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel-vaddd.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel-vaddd.ll Wed May  6 11:39:17 2015
@@ -0,0 +1,33 @@
+; RUN: llc %s -o - -verify-machineinstrs -fast-isel=true -mattr=+vfp4 -mattr=+neon | FileCheck %s
+
+target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
+target triple = "thumbv7s-apple-ios8.0.0"
+
+%union.DV = type { <2 x double> }
+
+; Fast-ISel was incorrectly trying to codegen <2 x double> adds and returning only a single vadds
+; Check that we generate the 2 vaddd's we expect
+
+; CHECK: vadd.f64
+; CHECK: vadd.f64
+
+define i32 @main(i32 %argc, i8** nocapture readnone %Argv, <2 x double> %tmp31) {
+bb:
+  %Ad = alloca %union.DV, align 16
+  %tmp32 = getelementptr inbounds %union.DV, %union.DV* %Ad, i32 0, i32 0
+  %tmp33 = fadd <2 x double> %tmp31, %tmp31
+  br label %bb37
+
+bb37:                                             ; preds = %bb37, %bb
+  %i.02 = phi i32 [ 0, %bb ], [ %tmp38, %bb37 ]
+  store <2 x double> %tmp33, <2 x double>* %tmp32, align 16
+  %tmp38 = add nuw nsw i32 %i.02, 1
+  %exitcond = icmp eq i32 %tmp38, 500000
+  br i1 %exitcond, label %bb39, label %bb37
+
+bb39:                                             ; preds = %bb37
+  call fastcc void @printDV(%union.DV* %Ad)
+  ret i32 0
+}
+
+declare hidden fastcc void @printDV(%union.DV* nocapture readonly)





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