[PATCH] Add VSX Scalar loads and stores to the PPC back end

[Bill Schmidt]

In general this looks very good.  Just a few inline comments from me.  I haven't added a register class myself, so you may want a thumbs-up from someone with that experience, but I can't think offhand of anything you might have missed.


REPOSITORY
  rL LLVM

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Comment at: lib/Target/PowerPC/PPCInstrVSX.td:1033
@@ -972,3 +1032,3 @@
 
-let Predicates = [HasDirectMove, HasVSX] in {
+let Predicates = [HasVSX] in {
 // VSX direct move instructions
----------------
nemanjai wrote:
> This was removed in response to a comment to the commit for the "direct moves" patch. The requirement is redundant since the DAG nodes only come from the custom lowering code and that code is guarded for direct moves.
This is a harmless redundancy and to me it seems worthwhile to leave in place.  Code gets re-designed, and it may not be a redundant requirement in the future.

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Comment at: lib/Target/PowerPC/PPCRegisterInfo.cpp:305
@@ -303,1 +304,3 @@
+    else if (RC == &PPC::F4RCRegClass && Subtarget.hasP8Vector())
+      return &PPC::VSSRCRegClass;
   }
----------------
&& Subtarget.hasVSX()  ?

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Comment at: test/CodeGen/PowerPC/ppc64le-smallarg.ll:47
@@ -46,2 +46,3 @@
+; CHECK: lxsspx {{[0-9]+}}, {{[0-9]+}}, [[TOCREG]]
 ; CHECK: blr
 
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You don't have a run line specifying -mcpu, so this is potentially fragile.

http://reviews.llvm.org/D9440

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