[PATCH] Add VSX Scalar loads and stores to the PPC back end

[Nemanja Ivanovic]

Hi wschmidt, hfinkel, kbarton, seurer,

This patch does two things:
1. Adds the new VSX scalar loads and stores introduced in ISA 2.07
2. Defines a new register class (VSSRC) similar to VSFRC that allows single precision (f32) values to be operated on in VSX registers.

In ISA 2.07, there is more complete support for single precision operations on the full set of VSX registers, so the new register class is needed.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9440

Files:
  lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstrInfo.cpp
  lib/Target/PowerPC/PPCInstrVSX.td
  lib/Target/PowerPC/PPCRegisterInfo.cpp
  lib/Target/PowerPC/PPCRegisterInfo.td
  test/CodeGen/PowerPC/ppc64le-smallarg.ll
  test/CodeGen/PowerPC/vsx_scalar_ld_st.ll
  test/MC/Disassembler/PowerPC/vsx.txt
  test/MC/PowerPC/vsx.s

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