[PATCH] Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.

[Andrea Di Biagio]

Hi qcolombet,

Revision 220239 exposed a latent bug in method 'TargetInstrInfo::commuteInstruction'.

When commuting the operands of a machine instruction, method 'commuteInstruction' doesn't correctly propagate the 'IsUndef' flag to the register operands of the new (commuted) instruction.

Before this patch, the following instruction:

  %vreg4<def> = VADDSDrr  %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5

was wrongly converted by method 'commuteInstruction' into:

  %vreg4<def> = VADDSDrr  %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14

The correct instruction should have been:

  %vreg4<def> = VADDSDrr  %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14

This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'. When swapping the operands of a machine instruction, we now make sure that 'IsUndef' flags are correctly set.
This fixes PR23103.

Added test case 'pr23103.ll' (obtained from the reproducible posted in PR23103).

Please let me know if ok to submit.

Thanks,
Andrea

http://reviews.llvm.org/D9406

Files:
  lib/CodeGen/TargetInstrInfo.cpp
  test/CodeGen/X86/pr23103.ll

Index: lib/CodeGen/TargetInstrInfo.cpp
===================================================================
--- lib/CodeGen/TargetInstrInfo.cpp
+++ lib/CodeGen/TargetInstrInfo.cpp
@@ -142,6 +142,8 @@
   unsigned SubReg2 = MI->getOperand(Idx2).getSubReg();
   bool Reg1IsKill = MI->getOperand(Idx1).isKill();
   bool Reg2IsKill = MI->getOperand(Idx2).isKill();
+  bool Reg1IsUndef = MI->getOperand(Idx1).isUndef();
+  bool Reg2IsUndef = MI->getOperand(Idx2).isUndef();
   // If destination is tied to either of the commuted source register, then
   // it must be updated.
   if (HasDef && Reg0 == Reg1 &&
@@ -172,6 +174,8 @@
   MI->getOperand(Idx1).setSubReg(SubReg2);
   MI->getOperand(Idx2).setIsKill(Reg1IsKill);
   MI->getOperand(Idx1).setIsKill(Reg2IsKill);
+  MI->getOperand(Idx2).setIsUndef(Reg1IsUndef);
+  MI->getOperand(Idx1).setIsUndef(Reg2IsUndef);
   return MI;
 }
 
Index: test/CodeGen/X86/pr23103.ll
===================================================================
--- test/CodeGen/X86/pr23103.ll
+++ test/CodeGen/X86/pr23103.ll
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s
+
+; When commuting a VADDSDrr instruction, verify that the 'isUndef' flag is
+; correctly propagated to the operands of the resulting instruction.
+; Test for PR23103;
+
+declare zeroext i1 @foo()
+
+define <1 x double> @pr23103(<1 x double>* align 8) {
+entry:
+  %A1114 = load <1 x double>, <1 x double>* %0, align 8
+  %call.i = call zeroext i1 @foo()
+  %A1114.op = fadd <1 x double> %A1114, undef
+  %A1114.op.op = fadd <1 x double> %A1114.op, undef
+  %add4 = select i1 %call.i, <1 x double> <double fadd (double fadd (double 1.000000e+00, double undef), double undef)>, <1 x double> %A1114.op.op
+  ret <1 x double> %add4
+}

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