[PATCH] [x86] instcombine more cases of insertps into a shufflevector
Simon Pilgrim
llvm-dev at redking.me.uk
Fri Apr 24 11:13:27 PDT 2015
Thanks Sanjay, a minor suggested change to support a (dumb) edge case that zeros out the inserted lane.
================
Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:232
@@ +231,3 @@
+ // shuffle with the zero vector.
+ if (II.getArgOperand(0) == II.getArgOperand(1)) {
+ V1 = ZeroVector;
----------------
A minor change would allow (silly) cases where the 2nd operand insertion has been zero'd away:
if ((II.getArgOperand(0) == II.getArgOperand(1)) || (Zmask & (1 << DestLane)))
http://reviews.llvm.org/D9257
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