[PATCH] R600: Correctly lower CONCAT_VECTOR nodes with more than 2 operands

Tom Stellard tom at stellard.net
Thu Apr 23 13:15:06 PDT 2015


Ping.

On Tue, Apr 07, 2015 at 07:00:07PM +0000, Tom Stellard wrote:
> ---
>  lib/Target/R600/AMDGPUISelLowering.cpp |  6 ++----
>  test/CodeGen/R600/concat_vectors.ll    | 11 +++++++++++
>  2 files changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
> index 2b266be..e66cd2d 100644
> --- a/lib/Target/R600/AMDGPUISelLowering.cpp
> +++ b/lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -837,11 +837,9 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,
>  SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op,
>                                                    SelectionDAG &DAG) const {
>    SmallVector<SDValue, 8> Args;
> -  SDValue A = Op.getOperand(0);
> -  SDValue B = Op.getOperand(1);
>  
> -  DAG.ExtractVectorElements(A, Args);
> -  DAG.ExtractVectorElements(B, Args);
> +  for (const SDUse &U : Op->ops())
> +    DAG.ExtractVectorElements(U.get(), Args);
>  
>    return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args);
>  }
> diff --git a/test/CodeGen/R600/concat_vectors.ll b/test/CodeGen/R600/concat_vectors.ll
> index 6b3fae3..a09ed1f 100644
> --- a/test/CodeGen/R600/concat_vectors.ll
> +++ b/test/CodeGen/R600/concat_vectors.ll
> @@ -283,3 +283,14 @@ define void @test_concat_v16i16(<32 x i16> addrspace(1)* %out, <16 x i16> %a, <1
>    store <32 x i16> %concat, <32 x i16> addrspace(1)* %out, align 64
>    ret void
>  }
> +
> +; FUNC-LABEL: {{^}}concat_vector_crash:
> +; SI: s_endpgm
> +define void @concat_vector_crash(<8 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) {
> +bb:
> +  %tmp = load <2 x float>, <2 x float> addrspace(1)* %in, align 4
> +  %tmp1 = shufflevector <2 x float> %tmp, <2 x float> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
> +  %tmp2 = shufflevector <8 x float> undef, <8 x float> %tmp1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
> +  store <8 x float> %tmp2, <8 x float> addrspace(1)* %out, align 32
> +  ret void
> +}
> -- 
> 2.0.4
> 
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