PATCHES: R600/SI: Add assembler support for new VOP1 and VOP2 VI instructions

[Tom Stellard]

On Fri, Apr 17, 2015 at 11:37:04AM -0700, Matt Arsenault wrote:
> On 04/17/2015 10:51 AM, Tom Stellard wrote:
> > Hi,
> >
> > The attached patches add assembler support for the new VI instructions,
> > which are mostly native I16/F16 operations.
> >
> > -Tom
> >
> 
> >
> > 0002-R600-SI-Improve-AsmParser-support-for-forced-e64-enc.patch
> >
> >
> >  From 824c50d0b994310658b1e88ac2f3bea807d3a992 Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Thu, 16 Apr 2015 09:39:55 -0400
> > Subject: [PATCH 2/7] R600/SI: Improve AsmParser support for forced e64
> >   encoding
> >
> > We can now force e64 encoding even when the operands would be legal
> > for e32 encoding.
> > ---
> >   lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp | 50 ++++++++++++++++++++++++---
> >   test/MC/R600/vop3-errs.s                      |  5 +++
> >   test/MC/R600/vop3.s                           | 11 ++++++
> >   3 files changed, 61 insertions(+), 5 deletions(-)
> >   create mode 100644 test/MC/R600/vop3-errs.s
> 
> LGTM. ForcedVOP3 might be a better name
> 
> >
> >  From d9785b148bdad1d4b3ce451345d0a100e6b8a8fd Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Fri, 17 Apr 2015 09:13:31 -0400
> > Subject: [PATCH 3/7] R600/SI: Use a better error message for unsupported
> >   instructions in the assembler
> >
> > ---
> >   lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> LGTM
> 
> >
> > 0004-R600-SI-v_mov_fed_b32-does-not-exist-on-VI.patch
> >
> >
> >  From 6419da6b2b61c700fdbdd75dccbc18febfc58cfd Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Wed, 15 Apr 2015 10:06:51 -0400
> > Subject: [PATCH 4/7] R600/SI: v_mov_fed_b32 does not exist on VI
> >
> > ---
> >   lib/Target/R600/SIInstructions.td | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> LGTM
> >
> > 0005-R600-SI-Add-assembler-support-for-all-CI-and-VI-VOP1.patch
> >
> >
> >  From 2912936c9fb1df4d9984bb117ce34e11188bfe64 Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Wed, 15 Apr 2015 14:21:54 -0400
> > Subject: [PATCH 5/7] R600/SI: Add assembler support for all CI and VI VOP1
> >   instructions
> >
> > ---
> >   lib/Target/R600/AMDGPU.td           |  26 +++-
> >   lib/Target/R600/AMDGPUSubtarget.cpp |   2 +-
> >   lib/Target/R600/AMDGPUSubtarget.h   |   2 +
> >   lib/Target/R600/CIInstructions.td   |   2 +-
> >   lib/Target/R600/SIInstrInfo.td      |  20 ++-
> >   lib/Target/R600/VIInstructions.td   |  30 ++++
> >   test/MC/R600/vop1.s                 | 299 ++++++++++++++++++++++++++++--------
> >   7 files changed, 308 insertions(+), 73 deletions(-)
> >
> > diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td
> > index 2eb805e..bd5f0f4 100644
> > --- a/lib/Target/R600/AMDGPU.td
> > +++ b/lib/Target/R600/AMDGPU.td
> > @@ -147,6 +147,18 @@ def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
> >           "GCN3Encoding",
> >           "true",
> >           "Encoding format for VI">;
> > +
> > +def FeatureCIInsts : SubtargetFeature<"ci-insts",
> > +        "CIInsts",
> > +        "true",
> > +        "Additional intstructions for CI+">;
> > +
> > +// Dummy feature used to disable assembler instructions.
> > +def FeatureDisable : SubtargetFeature<"feature-disable-do-not-use",
> > +                                      "FeatureDisable","true",
> > +                                      "Dummy feature to disable assembler"
> > +                                      " instructions">;
> > +
> I don't understand why either of these subtarget features is necessary. 
> Can you use an empty string or something for the flag name instead of 
> -do-not-use?
> 

Using an empty string for the flag worked.  These features are required
because assembler instructions can only be predicated on target features
and not code snippets like ISel.

-Tom

> 
> Other than that LGTM
> 
> >
> > 0006-R600-SI-Add-assembler-support-for-all-CI-and-VI-VOP2.patch
> >
> >
> >  From f34fd68219400447aead4d023bc5895d5b079af4 Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Thu, 16 Apr 2015 16:18:24 -0400
> > Subject: [PATCH 6/7] R600/SI: Add assembler support for all CI and VI VOP2
> >   instructions
> >
> > ---
> >   lib/Target/R600/SIInstrInfo.td    |  14 +-
> >   lib/Target/R600/SIInstructions.td |   8 +
> >   lib/Target/R600/VIInstructions.td |  49 ++++++
> >   test/MC/R600/vop2.s               | 325 +++++++++++++++++++++++++++++---------
> >   4 files changed, 320 insertions(+), 76 deletions(-)
> >
> LGTM
> 
> >
> >
> > 0007-R600-SI-Add-missing-mcpu-SI-to-assembler-test.patch
> >
> >
> >  From 14a0cc88b9e4a593a055e77f1dc93fd9980a66e9 Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Thu, 16 Apr 2015 16:18:39 -0400
> > Subject: [PATCH 7/7] R600/SI: Add missing -mcpu=SI to assembler test
> >
> > ---
> >   test/MC/R600/vop3.s | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> 
> LGTM