[llvm] r235616 - [PowerPC] Enable printing instructions using aliases
Hal Finkel
hfinkel at anl.gov
Thu Apr 23 11:30:39 PDT 2015
Author: hfinkel
Date: Thu Apr 23 13:30:38 2015
New Revision: 235616
URL: http://llvm.org/viewvc/llvm-project?rev=235616&view=rev
Log:
[PowerPC] Enable printing instructions using aliases
TableGen had been nicely generating code to print a number of instructions using
shorter aliases (and PowerPC has plenty of short mnemonics), but we were not
calling it. For some of the aliases we support in the parser, TableGen can't
infer the "inverse" alias relationship, so there is still more to do.
Thus, after some hours of updating test cases...
Modified:
llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
llvm/trunk/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
llvm/trunk/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
llvm/trunk/test/CodeGen/PowerPC/anon_aggr.ll
llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll
llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll
llvm/trunk/test/CodeGen/PowerPC/atomics-fences.ll
llvm/trunk/test/CodeGen/PowerPC/atomics-indexed.ll
llvm/trunk/test/CodeGen/PowerPC/atomics.ll
llvm/trunk/test/CodeGen/PowerPC/bperm.ll
llvm/trunk/test/CodeGen/PowerPC/cmpb-ppc32.ll
llvm/trunk/test/CodeGen/PowerPC/cmpb.ll
llvm/trunk/test/CodeGen/PowerPC/compare-simm.ll
llvm/trunk/test/CodeGen/PowerPC/crbit-asm.ll
llvm/trunk/test/CodeGen/PowerPC/crbits.ll
llvm/trunk/test/CodeGen/PowerPC/cttz.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-conversion.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-ext.ll
llvm/trunk/test/CodeGen/PowerPC/i64_fp_round.ll
llvm/trunk/test/CodeGen/PowerPC/long-compare.ll
llvm/trunk/test/CodeGen/PowerPC/ppc32-cyclecounter.ll
llvm/trunk/test/CodeGen/PowerPC/ppc64-zext.ll
llvm/trunk/test/CodeGen/PowerPC/rlwimi-and.ll
llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll
llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll
llvm/trunk/test/CodeGen/PowerPC/rotl.ll
llvm/trunk/test/CodeGen/PowerPC/sdag-ppcf128.ll
llvm/trunk/test/CodeGen/PowerPC/seteq-0.ll
llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll
llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll
llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll
llvm/trunk/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll
llvm/trunk/test/CodeGen/PowerPC/vsx-ldst.ll
llvm/trunk/test/CodeGen/PowerPC/vsx.ll
llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
llvm/trunk/test/CodeGen/PowerPC/vsx_shuffle_le.ll
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-operands.txt
llvm/trunk/test/MC/Disassembler/PowerPC/qpx.txt
llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt
llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding-6xx.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding-fp.s
llvm/trunk/test/MC/PowerPC/ppc64-encoding.s
llvm/trunk/test/MC/PowerPC/qpx.s
llvm/trunk/test/MC/PowerPC/vsx.s
Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Thu Apr 23 13:30:38 2015
@@ -31,6 +31,7 @@ static cl::opt<bool>
FullRegNames("ppc-asm-full-reg-names", cl::Hidden, cl::init(false),
cl::desc("Use full register names when printing assembly"));
+#define PRINT_ALIAS_INSTR
#include "PPCGenAsmWriter.inc"
void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
@@ -111,8 +112,9 @@ void PPCInstPrinter::printInst(const MCI
// precision). FIXME: Is there a better solution?
if (MI->getOpcode() == TargetOpcode::COPY_TO_REGCLASS)
return;
-
- printInstruction(MI, O);
+
+ if (!printAliasInstr(MI, O))
+ printInstruction(MI, O);
printAnnotation(O, Annot);
}
Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h (original)
+++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h Thu Apr 23 13:30:38 2015
@@ -39,6 +39,10 @@ public:
void printInstruction(const MCInst *MI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
+ bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
+ void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
+ unsigned PrintMethodIdx,
+ raw_ostream &OS);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printPredicateOperand(const MCInst *MI, unsigned OpNo,
Modified: llvm/trunk/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll Thu Apr 23 13:30:38 2015
@@ -1,5 +1,5 @@
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
-; RUN: grep cntlzw
+; RUN: grep cntlz
define i32 @foo() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2010-02-12-saveCR.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2010-02-12-saveCR.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2010-02-12-saveCR.ll Thu Apr 23 13:30:38 2015
@@ -9,13 +9,13 @@ entry:
; CHECK: mfcr [[T1:r[0-9]+]] ; cr2
; CHECK: lis [[T2:r[0-9]+]], 1
; CHECK: addi r3, r1, 72
-; CHECK: rlwinm [[T1]], [[T1]], 8, 0, 31
+; CHECK: rotlwi [[T1]], [[T1]], 8
; CHECK: ori [[T2]], [[T2]], 34540
; CHECK: stwx [[T1]], r1, [[T2]]
; CHECK: lis [[T3:r[0-9]+]], 1
; CHECK: mfcr [[T4:r[0-9]+]] ; cr3
; CHECK: ori [[T3]], [[T3]], 34536
-; CHECK: rlwinm [[T4]], [[T4]], 12, 0, 31
+; CHECK: rotlwi [[T4]], [[T4]], 12
; CHECK: stwx [[T4]], r1, [[T3]]
%x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
@@ -28,12 +28,12 @@ return:
; CHECK: lis [[T1:r[0-9]+]], 1
; CHECK: ori [[T1]], [[T1]], 34536
; CHECK: lwzx [[T1]], r1, [[T1]]
-; CHECK: rlwinm [[T1]], [[T1]], 20, 0, 31
+; CHECK: rotlwi [[T1]], [[T1]], 20
; CHECK: mtcrf 16, [[T1]]
; CHECK: lis [[T1]], 1
; CHECK: ori [[T1]], [[T1]], 34540
; CHECK: lwzx [[T1]], r1, [[T1]]
-; CHECK: rlwinm [[T1]], [[T1]], 24, 0, 31
+; CHECK: rotlwi [[T1]], [[T1]], 24
; CHECK: mtcrf 32, [[T1]]
ret void
}
Modified: llvm/trunk/test/CodeGen/PowerPC/anon_aggr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/anon_aggr.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/anon_aggr.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/anon_aggr.ll Thu Apr 23 13:30:38 2015
@@ -21,7 +21,7 @@ unequal:
}
; CHECK-LABEL: func1:
-; CHECK: cmpld {{[0-9]+}}, 4, 5
+; CHECK: cmpld {{([0-9]+,)?}}4, 5
; CHECK-DAG: std 4, -[[OFFSET1:[0-9]+]]
; CHECK-DAG: std 5, -[[OFFSET2:[0-9]+]]
; CHECK: ld 3, -[[OFFSET1]](1)
@@ -31,7 +31,7 @@ unequal:
; DARWIN32: mr
; DARWIN32: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
; DARWIN32: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REGB]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]]
; DARWIN32: stw r[[REG1]], -[[OFFSET1:[0-9]+]]
; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN32: lwz r3, -[[OFFSET1]]
@@ -41,7 +41,7 @@ unequal:
; DARWIN64: mr
; DARWIN64: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REGB]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]]
; DARWIN64: std r[[REG1]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET1]]
@@ -63,7 +63,7 @@ unequal:
; CHECK-LABEL: func2:
; CHECK: ld [[REG2:[0-9]+]], 72(1)
-; CHECK: cmpld {{[0-9]+}}, 4, [[REG2]]
+; CHECK: cmpld {{([0-9]+,)?}}4, [[REG2]]
; CHECK-DAG: std [[REG2]], -[[OFFSET1:[0-9]+]]
; CHECK-DAG: std 4, -[[OFFSET2:[0-9]+]]
; CHECK: ld 3, -[[OFFSET2]](1)
@@ -74,7 +74,7 @@ unequal:
; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGSP]])
; DARWIN32: mr
; DARWIN32: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REG2]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN32: lwz r3, -[[OFFSET1]]
@@ -84,7 +84,7 @@ unequal:
; DARWIN64: ld r[[REG2:[0-9]+]], 72(r1)
; DARWIN64: mr
; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REG2]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET1]]
@@ -108,7 +108,7 @@ unequal:
; CHECK-LABEL: func3:
; CHECK: ld [[REG3:[0-9]+]], 72(1)
; CHECK: ld [[REG4:[0-9]+]], 56(1)
-; CHECK: cmpld {{[0-9]+}}, [[REG4]], [[REG3]]
+; CHECK: cmpld {{([0-9]+,)?}}[[REG4]], [[REG3]]
; CHECK: std [[REG3]], -[[OFFSET1:[0-9]+]](1)
; CHECK: std [[REG4]], -[[OFFSET2:[0-9]+]](1)
; CHECK: ld 3, -[[OFFSET2]](1)
@@ -119,7 +119,7 @@ unequal:
; DARWIN32: addi r[[REG2:[0-9]+]], r[[REGSP]], 24
; DARWIN32: lwz r[[REG3:[0-9]+]], 44(r[[REGSP]])
; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]])
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN32: stw r[[REG4]], -[[OFFSET2:[0-9]+]]
; DARWIN32: lwz r3, -[[OFFSET2]]
@@ -128,7 +128,7 @@ unequal:
; DARWIN64: _func3:
; DARWIN64: ld r[[REG3:[0-9]+]], 72(r1)
; DARWIN64: ld r[[REG4:[0-9]+]], 56(r1)
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG4]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET2]]
@@ -153,7 +153,7 @@ unequal:
; CHECK-LABEL: func4:
; CHECK: ld [[REG3:[0-9]+]], 136(1)
; CHECK: ld [[REG2:[0-9]+]], 120(1)
-; CHECK: cmpld {{[0-9]+}}, [[REG2]], [[REG3]]
+; CHECK: cmpld {{([0-9]+,)?}}[[REG2]], [[REG3]]
; CHECK: std [[REG3]], -[[OFFSET2:[0-9]+]](1)
; CHECK: std [[REG2]], -[[OFFSET1:[0-9]+]](1)
; CHECK: ld 3, -[[OFFSET1]](1)
@@ -164,7 +164,7 @@ unequal:
; DARWIN32: addi r[[REG1:[0-9]+]], r1, 100
; DARWIN32: lwz r[[REG3:[0-9]+]], 108(r1)
; DARWIN32: mr r[[REG2:[0-9]+]], r[[REG4]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
; DARWIN32: stw r[[REG2]], -[[OFFSET1:[0-9]+]]
; DARWIN32: stw r[[REG3]], -[[OFFSET2:[0-9]+]]
; DARWIN32: lwz r[[REG1]], -[[OFFSET1]]
@@ -174,7 +174,7 @@ unequal:
; DARWIN64: ld r[[REG2:[0-9]+]], 120(r1)
; DARWIN64: ld r[[REG3:[0-9]+]], 136(r1)
; DARWIN64: mr r[[REG4:[0-9]+]], r[[REG2]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG2]], r[[REG3]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG2]], r[[REG3]]
; DARWIN64: std r[[REG4]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG3]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET1]]
Modified: llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll Thu Apr 23 13:30:38 2015
@@ -31,7 +31,7 @@ entry:
; CHECK-LABEL: @foo
; CHECK: ld [[REG:[0-9]+]], 0(4)
-; CHECK: cmpw 0, [[REG]], [[REG]]
+; CHECK: cmpw [[REG]], [[REG]]
; CHECK: bne- 0, .Ltmp[[TMP:[0-9]+]]
; CHECK: .Ltmp[[TMP]]:
; CHECK: isync
Modified: llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll Thu Apr 23 13:30:38 2015
@@ -84,7 +84,7 @@ define void @atomic_store(i64* %mem, i64
entry:
; CHECK: @atomic_store
store atomic i64 %val, i64* %mem release, align 64
-; CHECK: sync 1
+; CHECK: lwsync
; CHECK-NOT: stdcx
; CHECK: std
ret void
@@ -96,7 +96,7 @@ entry:
%tmp = load atomic i64, i64* %mem acquire, align 64
; CHECK-NOT: ldarx
; CHECK: ld
-; CHECK: sync 1
+; CHECK: lwsync
ret i64 %tmp
}
Modified: llvm/trunk/test/CodeGen/PowerPC/atomics-fences.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/atomics-fences.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/atomics-fences.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/atomics-fences.ll Thu Apr 23 13:30:38 2015
@@ -5,16 +5,16 @@
; Fences
define void @fence_acquire() {
; CHECK-LABEL: fence_acquire
-; CHECK: sync 1
-; PPC440-NOT: sync 1
+; CHECK: lwsync
+; PPC440-NOT: lwsync
; PPC440: msync
fence acquire
ret void
}
define void @fence_release() {
; CHECK-LABEL: fence_release
-; CHECK: sync 1
-; PPC440-NOT: sync 1
+; CHECK: lwsync
+; PPC440-NOT: lwsync
; PPC440: msync
fence release
ret void
Modified: llvm/trunk/test/CodeGen/PowerPC/atomics-indexed.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/atomics-indexed.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/atomics-indexed.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/atomics-indexed.ll Thu Apr 23 13:30:38 2015
@@ -11,7 +11,7 @@ define i8 @load_x_i8_seq_cst([100000 x i
; CHECK-LABEL: load_x_i8_seq_cst
; CHECK: sync 0
; CHECK: lbzx
-; CHECK: sync 1
+; CHECK: lwsync
%ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
%val = load atomic i8, i8* %ptr seq_cst, align 1
ret i8 %val
@@ -19,7 +19,7 @@ define i8 @load_x_i8_seq_cst([100000 x i
define i16 @load_x_i16_acquire([100000 x i16]* %mem) {
; CHECK-LABEL: load_x_i16_acquire
; CHECK: lhzx
-; CHECK: sync 1
+; CHECK: lwsync
%ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000
%val = load atomic i16, i16* %ptr acquire, align 2
ret i16 %val
@@ -54,7 +54,7 @@ define void @store_x_i8_seq_cst([100000
}
define void @store_x_i16_release([100000 x i16]* %mem) {
; CHECK-LABEL: store_x_i16_release
-; CHECK: sync 1
+; CHECK: lwsync
; CHECK: sthx
%ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000
store atomic i16 42, i16* %ptr release, align 2
@@ -71,7 +71,7 @@ define void @store_x_i32_monotonic([1000
define void @store_x_i64_unordered([100000 x i64]* %mem) {
; CHECK-LABEL: store_x_i64_unordered
; CHECK-NOT: sync 0
-; CHECK-NOT: sync 1
+; CHECK-NOT: lwsync
; PPC32: __sync_
; PPC64-NOT: __sync_
; PPC64: stdx
Modified: llvm/trunk/test/CodeGen/PowerPC/atomics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/atomics.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/atomics.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/atomics.ll Thu Apr 23 13:30:38 2015
@@ -27,7 +27,7 @@ define i32 @load_i32_acquire(i32* %mem)
; CHECK-LABEL: load_i32_acquire
; CHECK: lwz
%val = load atomic i32, i32* %mem acquire, align 4
-; CHECK: sync 1
+; CHECK: lwsync
ret i32 %val
}
define i64 @load_i64_seq_cst(i64* %mem) {
@@ -37,7 +37,7 @@ define i64 @load_i64_seq_cst(i64* %mem)
; PPC64-NOT: __sync_
; PPC64: ld
%val = load atomic i64, i64* %mem seq_cst, align 8
-; CHECK: sync 1
+; CHECK: lwsync
ret i64 %val
}
@@ -58,7 +58,7 @@ define void @store_i16_monotonic(i16* %m
}
define void @store_i32_release(i32* %mem) {
; CHECK-LABEL: store_i32_release
-; CHECK: sync 1
+; CHECK: lwsync
; CHECK: stw
store atomic i32 42, i32* %mem release, align 4
ret void
@@ -78,7 +78,7 @@ define i8 @cas_strong_i8_sc_sc(i8* %mem)
; CHECK-LABEL: cas_strong_i8_sc_sc
; CHECK: sync 0
%val = cmpxchg i8* %mem, i8 0, i8 1 seq_cst seq_cst
-; CHECK: sync 1
+; CHECK: lwsync
%loaded = extractvalue { i8, i1} %val, 0
ret i8 %loaded
}
@@ -86,21 +86,21 @@ define i16 @cas_weak_i16_acquire_acquire
; CHECK-LABEL: cas_weak_i16_acquire_acquire
;CHECK-NOT: sync
%val = cmpxchg weak i16* %mem, i16 0, i16 1 acquire acquire
-; CHECK: sync 1
+; CHECK: lwsync
%loaded = extractvalue { i16, i1} %val, 0
ret i16 %loaded
}
define i32 @cas_strong_i32_acqrel_acquire(i32* %mem) {
; CHECK-LABEL: cas_strong_i32_acqrel_acquire
-; CHECK: sync 1
+; CHECK: lwsync
%val = cmpxchg i32* %mem, i32 0, i32 1 acq_rel acquire
-; CHECK: sync 1
+; CHECK: lwsync
%loaded = extractvalue { i32, i1} %val, 0
ret i32 %loaded
}
define i64 @cas_weak_i64_release_monotonic(i64* %mem) {
; CHECK-LABEL: cas_weak_i64_release_monotonic
-; CHECK: sync 1
+; CHECK: lwsync
%val = cmpxchg weak i64* %mem, i64 0, i64 1 release monotonic
; CHECK-NOT: [sync ]
%loaded = extractvalue { i64, i1} %val, 0
@@ -118,19 +118,19 @@ define i16 @xor_i16_seq_cst(i16* %mem, i
; CHECK-LABEL: xor_i16_seq_cst
; CHECK: sync 0
%val = atomicrmw xor i16* %mem, i16 %operand seq_cst
-; CHECK: sync 1
+; CHECK: lwsync
ret i16 %val
}
define i32 @xchg_i32_acq_rel(i32* %mem, i32 %operand) {
; CHECK-LABEL: xchg_i32_acq_rel
-; CHECK: sync 1
+; CHECK: lwsync
%val = atomicrmw xchg i32* %mem, i32 %operand acq_rel
-; CHECK: sync 1
+; CHECK: lwsync
ret i32 %val
}
define i64 @and_i64_release(i64* %mem, i64 %operand) {
; CHECK-LABEL: and_i64_release
-; CHECK: sync 1
+; CHECK: lwsync
%val = atomicrmw and i64* %mem, i64 %operand release
; CHECK-NOT: [sync ]
ret i64 %val
Modified: llvm/trunk/test/CodeGen/PowerPC/bperm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bperm.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/bperm.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/bperm.ll Thu Apr 23 13:30:38 2015
@@ -22,15 +22,15 @@ entry:
ret i64 %0
; CHECK-LABEL: @bs8
-; CHECK-DAG: rldicl [[REG1:[0-9]+]], 3, 16, 0
-; CHECK-DAG: rldicl [[REG2:[0-9]+]], 3, 8, 0
-; CHECK-DAG: rldicl [[REG3:[0-9]+]], 3, 24, 0
+; CHECK-DAG: rotldi [[REG1:[0-9]+]], 3, 16
+; CHECK-DAG: rotldi [[REG2:[0-9]+]], 3, 8
+; CHECK-DAG: rotldi [[REG3:[0-9]+]], 3, 24
; CHECK-DAG: rldimi [[REG2]], [[REG1]], 8, 48
-; CHECK-DAG: rldicl [[REG4:[0-9]+]], 3, 32, 0
+; CHECK-DAG: rotldi [[REG4:[0-9]+]], 3, 32
; CHECK-DAG: rldimi [[REG2]], [[REG3]], 16, 40
-; CHECK-DAG: rldicl [[REG5:[0-9]+]], 3, 48, 0
+; CHECK-DAG: rotldi [[REG5:[0-9]+]], 3, 48
; CHECK-DAG: rldimi [[REG2]], [[REG4]], 24, 32
-; CHECK-DAG: rldicl [[REG6:[0-9]+]], 3, 56, 0
+; CHECK-DAG: rotldi [[REG6:[0-9]+]], 3, 56
; CHECK-DAG: rldimi [[REG2]], [[REG5]], 40, 16
; CHECK-DAG: rldimi [[REG2]], [[REG6]], 48, 8
; CHECK-DAG: rldimi [[REG2]], 3, 56, 0
@@ -46,7 +46,7 @@ entry:
; CHECK-LABEL: @test1
; CHECK-DAG: li [[REG1:[0-9]+]], 11375
-; CHECK-DAG: rldicl [[REG3:[0-9]+]], 4, 56, 0
+; CHECK-DAG: rotldi [[REG3:[0-9]+]], 4, 56
; CHECK-DAG: sldi [[REG2:[0-9]+]], [[REG1]], 19
; CHECK: and 3, [[REG3]], [[REG2]]
; CHECK: blr
@@ -60,7 +60,7 @@ entry:
; CHECK-LABEL: @test2
; CHECK-DAG: lis [[REG1:[0-9]+]], 474
-; CHECK-DAG: rldicl [[REG5:[0-9]+]], 4, 58, 0
+; CHECK-DAG: rotldi [[REG5:[0-9]+]], 4, 58
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 3648
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 32
; CHECK-DAG: oris [[REG4:[0-9]+]], [[REG3]], 25464
@@ -76,7 +76,7 @@ entry:
; CHECK-LABEL: @test3
; CHECK-DAG: lis [[REG1:[0-9]+]], 170
-; CHECK-DAG: rldicl [[REG4:[0-9]+]], 3, 34, 0
+; CHECK-DAG: rotldi [[REG4:[0-9]+]], 3, 34
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 22861
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 34
; CHECK: and 3, [[REG4]], [[REG3]]
@@ -90,7 +90,7 @@ entry:
ret i64 %and
; CHECK-LABEL: @test4
-; CHECK: rldicl [[REG1:[0-9]+]], 4, 49, 0
+; CHECK: rotldi [[REG1:[0-9]+]], 4, 49
; CHECK: andis. 3, [[REG1]], 888
; CHECK: blr
}
@@ -103,7 +103,7 @@ entry:
; CHECK-LABEL: @test5
; CHECK-DAG: lis [[REG1:[0-9]+]], 3703
-; CHECK-DAG: rldicl [[REG4:[0-9]+]], 4, 12, 0
+; CHECK-DAG: rotldi [[REG4:[0-9]+]], 4, 12
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 35951
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 19
; CHECK: and 3, [[REG4]], [[REG3]]
@@ -148,7 +148,7 @@ entry:
; CHECK-LABEL: @test8
; CHECK-DAG: lis [[REG1:[0-9]+]], 4
-; CHECK-DAG: rldicl [[REG4:[0-9]+]], 3, 63, 0
+; CHECK-DAG: rotldi [[REG4:[0-9]+]], 3, 63
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 60527
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 19
; CHECK: and 3, [[REG4]], [[REG3]]
@@ -166,8 +166,8 @@ entry:
; CHECK-LABEL: @test9
; CHECK-DAG: lis [[REG1:[0-9]+]], 1440
-; CHECK-DAG: rldicl [[REG5:[0-9]+]], 4, 62, 0
-; CHECK-DAG: rldicl [[REG6:[0-9]+]], 4, 50, 0
+; CHECK-DAG: rotldi [[REG5:[0-9]+]], 4, 62
+; CHECK-DAG: rotldi [[REG6:[0-9]+]], 4, 50
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 4
; CHECK-DAG: rldimi [[REG6]], [[REG5]], 53, 0
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG2]], 32
@@ -187,8 +187,8 @@ entry:
; CHECK-LABEL: @test10
; CHECK-DAG: lis [[REG1:[0-9]+]], 1
-; CHECK-DAG: rldicl [[REG6:[0-9]+]], 3, 25, 0
-; CHECK-DAG: rldicl [[REG7:[0-9]+]], 3, 37, 0
+; CHECK-DAG: rotldi [[REG6:[0-9]+]], 3, 25
+; CHECK-DAG: rotldi [[REG7:[0-9]+]], 3, 37
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 8183
; CHECK-DAG: ori [[REG3:[0-9]+]], [[REG1]], 50017
; CHECK-DAG: sldi [[REG4:[0-9]+]], [[REG2]], 25
Modified: llvm/trunk/test/CodeGen/PowerPC/cmpb-ppc32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/cmpb-ppc32.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/cmpb-ppc32.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/cmpb-ppc32.ll Thu Apr 23 13:30:38 2015
@@ -17,7 +17,7 @@ entry:
; CHECK-LABEL: @test16
; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
-; CHECK: rlwinm 3, [[REG1]], 0, 16, 31
+; CHECK: clrlwi 3, [[REG1]], 16
; CHECK: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/cmpb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/cmpb.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/cmpb.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/cmpb.ll Thu Apr 23 13:30:38 2015
@@ -17,7 +17,7 @@ entry:
; CHECK-LABEL: @test16
; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
-; CHECK: rldicl 3, [[REG1]], 0, 48
+; CHECK: clrldi 3, [[REG1]], 48
; CHECK: blr
}
@@ -73,7 +73,7 @@ entry:
; CHECK-LABEL: @test16p3
; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
-; CHECK: rldicl [[REG2:[0-9]+]], [[REG1]], 0, 55
+; CHECK: clrldi [[REG2:[0-9]+]], [[REG1]], 55
; CHECK: xori 3, [[REG2]], 1280
; CHECK: blr
}
@@ -99,7 +99,7 @@ entry:
; CHECK-LABEL: @test32
; CHECK: cmpb [[REG1:[0-9]+]], 4, 3
-; CHECK: rldicl 3, [[REG1]], 0, 32
+; CHECK: clrldi 3, [[REG1]], 32
; CHECK: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/compare-simm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/compare-simm.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/compare-simm.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/compare-simm.ll Thu Apr 23 13:30:38 2015
@@ -1,7 +1,9 @@
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
-; RUN: grep "cmpwi cr0, r3, -1"
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s
define i32 @test(i32 %x) nounwind {
+; CHECK-LABEL: @test
+; CHECK: cmpwi r3, -1
+
%c = icmp eq i32 %x, -1
br i1 %c, label %T, label %F
T:
Modified: llvm/trunk/test/CodeGen/PowerPC/crbit-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crbit-asm.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/crbit-asm.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/crbit-asm.ll Thu Apr 23 13:30:38 2015
@@ -12,7 +12,7 @@ entry:
; CHECK-LABEL: @testi1
; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
; CHECK-DAG: li [[REG1:[0-9]+]], 0
-; CHECK-DAG: cror [[REG2:[0-9]+]], 1, 1
+; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
; CHECK-DAG: li [[REG4:[0-9]+]], 1
@@ -31,7 +31,7 @@ entry:
; CHECK-LABEL: @testi32
; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
; CHECK-DAG: li [[REG1:[0-9]+]], 0
-; CHECK-DAG: cror [[REG2:[0-9]+]], 1, 1
+; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
; CHECK-DAG: li [[REG4:[0-9]+]], -1
@@ -47,7 +47,7 @@ entry:
; CHECK-LABEL: @testi8
; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
; CHECK-DAG: li [[REG1:[0-9]+]], 0
-; CHECK-DAG: cror [[REG2:[0-9]+]], 1, 1
+; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
; CHECK-DAG: li [[REG4:[0-9]+]], 1
Modified: llvm/trunk/test/CodeGen/PowerPC/crbits.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crbits.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/crbits.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/crbits.ll Thu Apr 23 13:30:38 2015
@@ -107,7 +107,7 @@ entry:
; CHECK-LABEL: @test6
; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
; CHECK-DAG: cmpwi {{[0-9]+}}, 5, -2
-; CHECK-DAG: cror [[REG1:[0-9]+]], 1, 1
+; CHECK-DAG: crmove [[REG1:[0-9]+]], 1
; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
; CHECK-DAG: li [[REG2:[0-9]+]], 1
; CHECK-DAG: crorc [[REG4:[0-9]+]], 1,
Modified: llvm/trunk/test/CodeGen/PowerPC/cttz.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/cttz.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/cttz.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/cttz.ll Thu Apr 23 13:30:38 2015
@@ -6,7 +6,7 @@ declare i32 @llvm.cttz.i32(i32, i1)
define i32 @bar(i32 %x) {
entry:
; CHECK: @bar
-; CHECK: cntlzw
+; CHECK: cntlz
%tmp.1 = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ; <i32> [#uses=1]
ret i32 %tmp.1
}
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll Thu Apr 23 13:30:38 2015
@@ -201,7 +201,7 @@ define void @t12(i8 %a) uwtable ssp {
entry:
; ELF64: t12
%cmp = icmp ugt i8 %a, -113
-; ELF64: rlwinm
+; ELF64: clrlwi
; ELF64: cmplwi
br i1 %cmp, label %if.then, label %if.end
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-conversion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-conversion.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-conversion.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-conversion.ll Thu Apr 23 13:30:38 2015
@@ -253,7 +253,7 @@ entry:
; ELF64LE: std
; ELF64LE: lfd
; ELF64LE: fcfidus
-; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31
+; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
; PPC970: std
; PPC970: lfd
; PPC970: fcfid
@@ -277,7 +277,7 @@ entry:
; ELF64LE: std
; ELF64LE: lfd
; ELF64LE: fcfidus
-; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
+; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
; PPC970: std
; PPC970: lfd
; PPC970: fcfid
@@ -342,7 +342,7 @@ entry:
; ELF64LE: std
; ELF64LE: lfd
; ELF64LE: fcfidu
-; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31
+; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
; PPC970: std
; PPC970: lfd
; PPC970: fcfid
@@ -365,7 +365,7 @@ entry:
; ELF64LE: std
; ELF64LE: lfd
; ELF64LE: fcfidu
-; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
+; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
; PPC970: std
; PPC970: lfd
; PPC970: fcfid
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-ext.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-ext.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-ext.ll Thu Apr 23 13:30:38 2015
@@ -5,14 +5,14 @@
define i32 @zext_8_32(i8 %a) nounwind ssp {
; ELF64: zext_8_32
%r = zext i8 %a to i32
-; ELF64: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
+; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
ret i32 %r
}
define i32 @zext_16_32(i16 %a) nounwind ssp {
; ELF64: zext_16_32
%r = zext i16 %a to i32
-; ELF64: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31
+; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
ret i32 %r
}
Modified: llvm/trunk/test/CodeGen/PowerPC/i64_fp_round.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/i64_fp_round.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/i64_fp_round.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/i64_fp_round.ll Thu Apr 23 13:30:38 2015
@@ -14,7 +14,7 @@ entry:
; CHECK: sradi [[REG1:[0-9]+]], 3, 53
; CHECK: addi [[REG2:[0-9]+]], [[REG1]], 1
-; CHECK: cmpldi 0, [[REG2]], 1
+; CHECK: cmpldi [[REG2]], 1
; CHECK: isel [[REG3:[0-9]+]], {{[0-9]+}}, 3, 1
; CHECK: std [[REG3]], -{{[0-9]+}}(1)
Modified: llvm/trunk/test/CodeGen/PowerPC/long-compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/long-compare.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/long-compare.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/long-compare.ll Thu Apr 23 13:30:38 2015
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=ppc32 | grep cntlzw
+; RUN: llc < %s -march=ppc32 | grep cntlz
; RUN: llc < %s -march=ppc32 | not grep xori
; RUN: llc < %s -march=ppc32 | not grep "li "
; RUN: llc < %s -march=ppc32 | not grep "mr "
Modified: llvm/trunk/test/CodeGen/PowerPC/ppc32-cyclecounter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc32-cyclecounter.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc32-cyclecounter.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc32-cyclecounter.ll Thu Apr 23 13:30:38 2015
@@ -13,8 +13,8 @@ entry:
; CHECK: mfspr 3, 269
; CHECK: mfspr 4, 268
; CHECK: mfspr [[REG:[0-9]+]], 269
-; CHECK: cmpw [[CR:[0-9]+]], 3, [[REG]]
-; CHECK: bne [[CR]], .LBB
+; CHECK: cmpw 3, [[REG]]
+; CHECK: bne 0, .LBB
declare i64 @llvm.readcyclecounter()
Modified: llvm/trunk/test/CodeGen/PowerPC/ppc64-zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc64-zext.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-zext.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-zext.ll Thu Apr 23 13:30:38 2015
@@ -4,7 +4,7 @@ target triple = "powerpc64-unknown-linux
define i64 @fun(i32 %arg32) nounwind {
entry:
-; CHECK: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 32
+; CHECK: clrldi {{[0-9]+}}, {{[0-9]+}}, 32
%o = zext i32 %arg32 to i64
ret i64 %o
}
Modified: llvm/trunk/test/CodeGen/PowerPC/rlwimi-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rlwimi-and.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/rlwimi-and.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/rlwimi-and.ll Thu Apr 23 13:30:38 2015
@@ -29,7 +29,7 @@ codeRepl17:
unreachable
; CHECK: @test
-; CHECK: rlwinm [[R1:[0-9]+]], {{[0-9]+}}, 0, 31, 31
+; CHECK: clrlwi [[R1:[0-9]+]], {{[0-9]+}}, 31
; CHECK: rlwimi [[R1]], {{[0-9]+}}, 8, 23, 23
codeRepl29: ; preds = %codeRepl1
Modified: llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/rotl-2.ll Thu Apr 23 13:30:38 2015
@@ -1,5 +1,6 @@
-; RUN: llc < %s -march=ppc32 | grep rlwinm | count 4
-; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
+; RUN: llc < %s -march=ppc32 | grep rotlwi | count 2
+; RUN: llc < %s -march=ppc32 | grep clrlwi | count 2
+; RUN: llc < %s -march=ppc32 | grep rotlw | count 4
; RUN: llc < %s -march=ppc32 | not grep or
define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
Modified: llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll Thu Apr 23 13:30:38 2015
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=ppc64 | grep rldicl
-; RUN: llc < %s -march=ppc64 | grep rldcl
+; RUN: llc < %s -march=ppc64 | grep rotld
+; RUN: llc < %s -march=ppc64 | grep rotldi
; PR1613
define i64 @t1(i64 %A) {
Modified: llvm/trunk/test/CodeGen/PowerPC/rotl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/rotl.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/rotl.ll Thu Apr 23 13:30:38 2015
@@ -1,5 +1,7 @@
-; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
-; RUN: llc < %s -march=ppc32 | grep rlwinm | count 2
+; RUN: llc < %s -march=ppc32 | grep rotrw: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotlw: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotlwi: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotrwi: | count 1
define i32 @rotlw(i32 %x, i32 %sh) {
entry:
Modified: llvm/trunk/test/CodeGen/PowerPC/sdag-ppcf128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/sdag-ppcf128.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/sdag-ppcf128.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/sdag-ppcf128.ll Thu Apr 23 13:30:38 2015
@@ -5,7 +5,7 @@
define fastcc void @_D3std4math4sqrtFNaNbNfcZc() {
entry:
br i1 undef, label %if, label %else
-; CHECK: cmplwi 0, 3, 0
+; CHECK: cmplwi 3, 0
if: ; preds = %entry
store { ppc_fp128, ppc_fp128 } zeroinitializer, { ppc_fp128, ppc_fp128 }* undef
ret void
Modified: llvm/trunk/test/CodeGen/PowerPC/seteq-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/seteq-0.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/seteq-0.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/seteq-0.ll Thu Apr 23 13:30:38 2015
@@ -5,7 +5,7 @@ define i32 @eq0(i32 %a) {
%tmp.2 = zext i1 %tmp.1 to i32 ; <i32> [#uses=1]
ret i32 %tmp.2
-; CHECK: cntlzw [[REG:r[0-9]+]], r3
+; CHECK: cntlz [[REG:r[0-9]+]], r3
; CHECK: rlwinm r3, [[REG]], 27, 31, 31
; CHECK: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/stack-realign.ll Thu Apr 23 13:30:38 2015
@@ -30,7 +30,7 @@ entry:
; CHECK-LABEL: @goo
; CHECK-DAG: mflr 0
-; CHECK-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
+; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-DAG: std 30, -16(1)
; CHECK-DAG: mr 30, 1
; CHECK-DAG: std 0, 16(1)
@@ -52,7 +52,7 @@ entry:
; CHECK-FP-LABEL: @goo
; CHECK-FP-DAG: mflr 0
-; CHECK-FP-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
+; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-FP-DAG: std 31, -8(1)
; CHECK-FP-DAG: std 30, -16(1)
; CHECK-FP-DAG: mr 30, 1
@@ -78,7 +78,7 @@ entry:
; CHECK-32-LABEL: @goo
; CHECK-32-DAG: mflr 0
-; CHECK-32-DAG: rlwinm [[REG:[0-9]+]], 1, 0, 27, 31
+; CHECK-32-DAG: clrlwi [[REG:[0-9]+]], 1, 27
; CHECK-32-DAG: stw 30, -8(1)
; CHECK-32-DAG: mr 30, 1
; CHECK-32-DAG: stw 0, 4(1)
@@ -87,7 +87,7 @@ entry:
; CHECK-32-PIC-LABEL: @goo
; CHECK-32-PIC-DAG: mflr 0
-; CHECK-32-PIC-DAG: rlwinm [[REG:[0-9]+]], 1, 0, 27, 31
+; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27
; CHECK-32-PIC-DAG: stw 29, -12(1)
; CHECK-32-PIC-DAG: mr 29, 1
; CHECK-32-PIC-DAG: stw 0, 4(1)
@@ -113,7 +113,7 @@ entry:
; CHECK-LABEL: @hoo
; CHECK-DAG: lis [[REG1:[0-9]+]], -13
-; CHECK-DAG: rldicl [[REG3:[0-9]+]], 1, 0, 59
+; CHECK-DAG: clrldi [[REG3:[0-9]+]], 1, 59
; CHECK-DAG: mflr 0
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51808
; CHECK-DAG: std 30, -16(1)
@@ -129,7 +129,7 @@ entry:
; CHECK-32-LABEL: @hoo
; CHECK-32-DAG: lis [[REG1:[0-9]+]], -13
-; CHECK-32-DAG: rlwinm [[REG3:[0-9]+]], 1, 0, 27, 31
+; CHECK-32-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
; CHECK-32-DAG: mflr 0
; CHECK-32-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904
; CHECK-32-DAG: stw 30, -8(1)
@@ -143,7 +143,7 @@ entry:
; CHECK-32-PIC-LABEL: @hoo
; CHECK-32-PIC-DAG: lis [[REG1:[0-9]+]], -13
-; CHECK-32-PIC-DAG: rlwinm [[REG3:[0-9]+]], 1, 0, 27, 31
+; CHECK-32-PIC-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
; CHECK-32-PIC-DAG: mflr 0
; CHECK-32-PIC-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51904
; CHECK-32-PIC-DAG: stw 29, -12(1)
@@ -175,7 +175,7 @@ entry:
; CHECK-LABEL: @loo
; CHECK-DAG: mflr 0
-; CHECK-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
+; CHECK-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-DAG: std 30, -32(1)
; CHECK-DAG: mr 30, 1
; CHECK-DAG: std 0, 16(1)
@@ -191,7 +191,7 @@ entry:
; CHECK-FP-LABEL: @loo
; CHECK-FP-DAG: mflr 0
-; CHECK-FP-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
+; CHECK-FP-DAG: clrldi [[REG:[0-9]+]], 1, 59
; CHECK-FP-DAG: std 31, -24(1)
; CHECK-FP-DAG: std 30, -32(1)
; CHECK-FP-DAG: mr 30, 1
Modified: llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/subreg-postra-2.ll Thu Apr 23 13:30:38 2015
@@ -160,7 +160,7 @@ while.end418:
; CHECK-LABEL: @jbd2_journal_commit_transaction
; CHECK: andi.
-; CHECK: cror [[REG:[0-9]+]], 1, 1
+; CHECK: crmove [[REG:[0-9]+]], 1
; CHECK: stdcx.
; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, [[REG]]
Modified: llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/subreg-postra.ll Thu Apr 23 13:30:38 2015
@@ -143,7 +143,7 @@ wait_on_buffer.exit1319:
; CHECK-LABEL: @jbd2_journal_commit_transaction
; CHECK: andi.
-; CHECK: cror [[REG:[0-9]+]], 1, 1
+; CHECK: crmove [[REG:[0-9]+]], 1
; CHECK: stdcx.
; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, [[REG]]
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll Thu Apr 23 13:30:38 2015
@@ -1,7 +1,7 @@
; RUN: llc -mcpu=pwr8 -mattr=+vsx -O2 -mtriple=powerpc64le-unknown-linux-gnu < %s > %t
; RUN: grep lxvd2x < %t | count 18
; RUN: grep stxvd2x < %t | count 18
-; RUN: grep xxpermdi < %t | count 36
+; RUN: grep xxswapd < %t | count 36
@vf = global <4 x float> <float -1.500000e+00, float 2.500000e+00, float -3.500000e+00, float 4.500000e+00>, align 16
@vd = global <2 x double> <double 3.500000e+00, double -7.500000e+00>, align 16
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx-ldst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx-ldst.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx-ldst.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx-ldst.ll Thu Apr 23 13:30:38 2015
@@ -12,7 +12,7 @@
; RUN: llc -mcpu=pwr8 -mattr=+vsx -O2 -mtriple=powerpc64le-unknown-linux-gnu < %s > %t
; RUN: grep lxvd2x < %t | count 6
; RUN: grep stxvd2x < %t | count 6
-; RUN: grep xxpermdi < %t | count 12
+; RUN: grep xxswapd < %t | count 12
@vsi = global <4 x i32> <i32 -1, i32 2, i32 -3, i32 4>, align 16
@vui = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx.ll Thu Apr 23 13:30:38 2015
@@ -733,7 +733,7 @@ define <2 x double> @test51(<2 x double>
ret <2 x double> %v
; CHECK-LABEL: @test51
-; CHECK: xxpermdi 34, 34, 34, 0
+; CHECK: xxspltd 34, 34, 0
; CHECK: blr
}
@@ -742,7 +742,7 @@ define <2 x double> @test52(<2 x double>
ret <2 x double> %v
; CHECK-LABEL: @test52
-; CHECK: xxpermdi 34, 34, 35, 0
+; CHECK: xxmrghd 34, 34, 35
; CHECK: blr
}
@@ -751,7 +751,7 @@ define <2 x double> @test53(<2 x double>
ret <2 x double> %v
; CHECK-LABEL: @test53
-; CHECK: xxpermdi 34, 35, 34, 0
+; CHECK: xxmrghd 34, 35, 34
; CHECK: blr
}
@@ -769,7 +769,7 @@ define <2 x double> @test55(<2 x double>
ret <2 x double> %v
; CHECK-LABEL: @test55
-; CHECK: xxpermdi 34, 34, 35, 3
+; CHECK: xxmrgld 34, 34, 35
; CHECK: blr
}
@@ -778,7 +778,7 @@ define <2 x i64> @test56(<2 x i64> %a, <
ret <2 x i64> %v
; CHECK-LABEL: @test56
-; CHECK: xxpermdi 34, 34, 35, 3
+; CHECK: xxmrgld 34, 34, 35
; CHECK: blr
}
@@ -843,11 +843,11 @@ define double @test64(<2 x double> %a) {
ret double %v
; CHECK-REG-LABEL: @test64
-; CHECK-REG: xxpermdi 1, 34, 34, 2
+; CHECK-REG: xxswapd 1, 34
; CHECK-REG: blr
; CHECK-FISL-LABEL: @test64
-; CHECK-FISL: xxpermdi 34, 34, 34, 2
+; CHECK-FISL: xxswapd 34, 34
; CHECK-FISL: xxlor 0, 34, 34
; CHECK-FISL: fmr 1, 0
; CHECK-FISL: blr
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx_insert_extract_le.ll Thu Apr 23 13:30:38 2015
@@ -9,8 +9,8 @@ define <2 x double> @testi0(<2 x double>
; CHECK-LABEL: testi0
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxsdx 34, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 34, 34, 0
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 1, 34, 0
; CHECK: xxpermdi 34, 0, 1, 1
}
@@ -23,9 +23,9 @@ define <2 x double> @testi1(<2 x double>
; CHECK-LABEL: testi1
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxsdx 34, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 34, 34, 0
-; CHECK: xxpermdi 34, 1, 0, 3
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 1, 34, 0
+; CHECK: xxmrgld 34, 1, 0
}
define double @teste0(<2 x double>* %p1) {
@@ -37,8 +37,8 @@ define double @teste0(<2 x double>* %p1)
; CHECK-LABEL: teste0
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 0, 0, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 0
}
define double @teste1(<2 x double>* %p1) {
@@ -48,5 +48,5 @@ define double @teste1(<2 x double>* %p1)
; CHECK-LABEL: teste1
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 1, 0, 0, 2
+; CHECK: xxswapd 1, 0
}
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx_shuffle_le.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx_shuffle_le.ll?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx_shuffle_le.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx_shuffle_le.ll Thu Apr 23 13:30:38 2015
@@ -8,8 +8,8 @@ define <2 x double> @test00(<2 x double>
; CHECK-LABEL: test00
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 3
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 34, 0, 1
}
define <2 x double> @test01(<2 x double>* %p1, <2 x double>* %p2) {
@@ -20,7 +20,7 @@ define <2 x double> @test01(<2 x double>
; CHECK-LABEL: test01
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 34, 0, 0, 2
+; CHECK: xxswapd 34, 0
}
define <2 x double> @test02(<2 x double>* %p1, <2 x double>* %p2) {
@@ -32,9 +32,9 @@ define <2 x double> @test02(<2 x double>
; CHECK-LABEL: @test02
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
-; CHECK: xxpermdi 34, 1, 0, 3
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
+; CHECK: xxmrgld 34, 1, 0
}
define <2 x double> @test03(<2 x double>* %p1, <2 x double>* %p2) {
@@ -46,8 +46,8 @@ define <2 x double> @test03(<2 x double>
; CHECK-LABEL: @test03
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
; CHECK: xxpermdi 34, 1, 0, 1
}
@@ -59,8 +59,8 @@ define <2 x double> @test10(<2 x double>
; CHECK-LABEL: @test10
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 34, 0
}
define <2 x double> @test11(<2 x double>* %p1, <2 x double>* %p2) {
@@ -71,8 +71,8 @@ define <2 x double> @test11(<2 x double>
; CHECK-LABEL: @test11
; CHECK: lxvd2x 0, 0, 3
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 0
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 34, 0, 0
}
define <2 x double> @test12(<2 x double>* %p1, <2 x double>* %p2) {
@@ -84,8 +84,8 @@ define <2 x double> @test12(<2 x double>
; CHECK-LABEL: @test12
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
; CHECK: xxpermdi 34, 1, 0, 2
}
@@ -98,9 +98,9 @@ define <2 x double> @test13(<2 x double>
; CHECK-LABEL: @test13
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
-; CHECK: xxpermdi 34, 1, 0, 0
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
+; CHECK: xxmrghd 34, 1, 0
}
define <2 x double> @test20(<2 x double>* %p1, <2 x double>* %p2) {
@@ -112,9 +112,9 @@ define <2 x double> @test20(<2 x double>
; CHECK-LABEL: @test20
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
-; CHECK: xxpermdi 34, 0, 1, 3
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
+; CHECK: xxmrgld 34, 0, 1
}
define <2 x double> @test21(<2 x double>* %p1, <2 x double>* %p2) {
@@ -126,8 +126,8 @@ define <2 x double> @test21(<2 x double>
; CHECK-LABEL: @test21
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
; CHECK: xxpermdi 34, 0, 1, 1
}
@@ -139,8 +139,8 @@ define <2 x double> @test22(<2 x double>
; CHECK-LABEL: @test22
; CHECK: lxvd2x 0, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 3
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 34, 0, 1
}
define <2 x double> @test23(<2 x double>* %p1, <2 x double>* %p2) {
@@ -151,7 +151,7 @@ define <2 x double> @test23(<2 x double>
; CHECK-LABEL: @test23
; CHECK: lxvd2x 0, 0, 4
-; CHECK: xxpermdi 34, 0, 0, 2
+; CHECK: xxswapd 34, 0
}
define <2 x double> @test30(<2 x double>* %p1, <2 x double>* %p2) {
@@ -163,8 +163,8 @@ define <2 x double> @test30(<2 x double>
; CHECK-LABEL: @test30
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
; CHECK: xxpermdi 34, 0, 1, 2
}
@@ -177,9 +177,9 @@ define <2 x double> @test31(<2 x double>
; CHECK-LABEL: @test31
; CHECK: lxvd2x 0, 0, 3
; CHECK: lxvd2x 1, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 1, 1, 1, 2
-; CHECK: xxpermdi 34, 0, 1, 0
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 1, 1
+; CHECK: xxmrghd 34, 0, 1
}
define <2 x double> @test32(<2 x double>* %p1, <2 x double>* %p2) {
@@ -190,8 +190,8 @@ define <2 x double> @test32(<2 x double>
; CHECK-LABEL: @test32
; CHECK: lxvd2x 0, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 2
+; CHECK: xxswapd 0, 0
+; CHECK: xxswapd 34, 0
}
define <2 x double> @test33(<2 x double>* %p1, <2 x double>* %p2) {
@@ -202,6 +202,6 @@ define <2 x double> @test33(<2 x double>
; CHECK-LABEL: @test33
; CHECK: lxvd2x 0, 0, 4
-; CHECK: xxpermdi 0, 0, 0, 2
-; CHECK: xxpermdi 34, 0, 0, 0
+; CHECK: xxswapd 0, 0
+; CHECK: xxspltd 34, 0, 0
}
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt Thu Apr 23 13:30:38 2015
@@ -5,14 +5,14 @@
# CHECK: mtdcr 178, 3
0x7c 0x72 0x2b 0x86
-# CHECK: tlbre 2, 3, 0
+# CHECK: tlbrehi 2, 3
0x7c 0x43 0x07 0x64
-# CHECK: tlbre 2, 3, 1
+# CHECK: tlbrelo 2, 3
0x7c 0x43 0x0f 0x64
-# CHECK: tlbwe 2, 3, 0
+# CHECK: tlbwehi 2, 3
0x7c 0x43 0x07 0xa4
-# CHECK: tlbwe 2, 3, 1
+# CHECK: tlbwelo 2, 3
0x7c 0x43 0x0f 0xa4
# CHECK: tlbsx 2, 3, 1
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt Thu Apr 23 13:30:38 2015
@@ -27,13 +27,13 @@
# CHECK: stdcx. 2, 3, 4
0x7c 0x43 0x21 0xad
-# CHECK: sync 2
+# CHECK: ptesync
0x7c 0x40 0x04 0xac
# CHECK: eieio
0x7c 0x00 0x06 0xac
-# CHECK: wait 2
+# CHECK: waitimpl
0x7c 0x40 0x00 0x7c
# CHECK: mbar 1
@@ -72,19 +72,19 @@
# CHECK: sync 0
0x7c 0x00 0x04 0xac
-# CHECK: sync 1
+# CHECK: lwsync
0x7c 0x20 0x04 0xac
-# CHECK: sync 2
+# CHECK: ptesync
0x7c 0x40 0x04 0xac
-# CHECK: wait 0
+# CHECK: wait
0x7c 0x00 0x00 0x7c
-# CHECK: wait 1
+# CHECK: waitrsv
0x7c 0x20 0x00 0x7c
-# CHECK: wait 2
+# CHECK: waitimpl
0x7c 0x40 0x00 0x7c
# CHECK: mftb 2, 123
@@ -93,6 +93,6 @@
# CHECK: mftb 2, 268
0x7c 0x4c 0x42 0xe6
-# CHECK: mftb 2, 269
+# CHECK: mftbu 2
0x7c 0x4d 0x42 0xe6
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt Thu Apr 23 13:30:38 2015
@@ -1,6 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
-# CHECK: mtmsr 4, 0
+# CHECK: mtmsr 4
0x7c 0x80 0x01 0x24
# CHECK: mtmsr 4, 1
@@ -9,7 +9,7 @@
# CHECK: mfmsr 4
0x7c 0x80 0x00 0xa6
-# CHECK: mtmsrd 4, 0
+# CHECK: mtmsrd 4
0x7c 0x80 0x01 0x64
# CHECK: mtmsrd 4, 1
@@ -60,7 +60,7 @@
# CHECK: mtspr 22, 4
0x7c 0x96 0x03 0xa6
-# CHECK: mfspr 4, 287
+# CHECK: mfpvr 4
0x7c 0x9f 0x42 0xa6
# CHECK: mfspr 4, 25
@@ -99,10 +99,10 @@
# CHECK: tlbiel 4
0x7c 0x00 0x22 0x24
-# CHECK: tlbie 4,0
+# CHECK: tlbie 4
0x7c 0x00 0x22 0x64
-# CHECK: tlbie 4,0
+# CHECK: tlbie 4
0x7c 0x00 0x22 0x64
# CHECK: rfi
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt Thu Apr 23 13:30:38 2015
@@ -1,155 +1,155 @@
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
# FIXME: decode as beqlr 0
-# CHECK: bclr 12, 2, 0
+# CHECK: bclr 12, 2
0x4d 0x82 0x00 0x20
# FIXME: decode as beqlr 1
-# CHECK: bclr 12, 6, 0
+# CHECK: bclr 12, 6
0x4d 0x86 0x00 0x20
# FIXME: decode as beqlr 2
-# CHECK: bclr 12, 10, 0
+# CHECK: bclr 12, 10
0x4d 0x8a 0x00 0x20
# FIXME: decode as beqlr 3
-# CHECK: bclr 12, 14, 0
+# CHECK: bclr 12, 14
0x4d 0x8e 0x00 0x20
# FIXME: decode as beqlr 4
-# CHECK: bclr 12, 18, 0
+# CHECK: bclr 12, 18
0x4d 0x92 0x00 0x20
# FIXME: decode as beqlr 5
-# CHECK: bclr 12, 22, 0
+# CHECK: bclr 12, 22
0x4d 0x96 0x00 0x20
# FIXME: decode as beqlr 6
-# CHECK: bclr 12, 26, 0
+# CHECK: bclr 12, 26
0x4d 0x9a 0x00 0x20
# FIXME: decode as beqlr 7
-# CHECK: bclr 12, 30, 0
+# CHECK: bclr 12, 30
0x4d 0x9e 0x00 0x20
-# CHECK: bclr 12, 0, 0
+# CHECK: bclr 12, 0
0x4d 0x80 0x00 0x20
-# CHECK: bclr 12, 1, 0
+# CHECK: bclr 12, 1
0x4d 0x81 0x00 0x20
-# CHECK: bclr 12, 2, 0
+# CHECK: bclr 12, 2
0x4d 0x82 0x00 0x20
-# CHECK: bclr 12, 3, 0
+# CHECK: bclr 12, 3
0x4d 0x83 0x00 0x20
-# CHECK: bclr 12, 3, 0
+# CHECK: bclr 12, 3
0x4d 0x83 0x00 0x20
-# CHECK: bclr 12, 4, 0
+# CHECK: bclr 12, 4
0x4d 0x84 0x00 0x20
-# CHECK: bclr 12, 5, 0
+# CHECK: bclr 12, 5
0x4d 0x85 0x00 0x20
-# CHECK: bclr 12, 6, 0
+# CHECK: bclr 12, 6
0x4d 0x86 0x00 0x20
-# CHECK: bclr 12, 7, 0
+# CHECK: bclr 12, 7
0x4d 0x87 0x00 0x20
-# CHECK: bclr 12, 7, 0
+# CHECK: bclr 12, 7
0x4d 0x87 0x00 0x20
-# CHECK: bclr 12, 8, 0
+# CHECK: bclr 12, 8
0x4d 0x88 0x00 0x20
-# CHECK: bclr 12, 9, 0
+# CHECK: bclr 12, 9
0x4d 0x89 0x00 0x20
-# CHECK: bclr 12, 10, 0
+# CHECK: bclr 12, 10
0x4d 0x8a 0x00 0x20
-# CHECK: bclr 12, 11, 0
+# CHECK: bclr 12, 11
0x4d 0x8b 0x00 0x20
-# CHECK: bclr 12, 11, 0
+# CHECK: bclr 12, 11
0x4d 0x8b 0x00 0x20
-# CHECK: bclr 12, 12, 0
+# CHECK: bclr 12, 12
0x4d 0x8c 0x00 0x20
-# CHECK: bclr 12, 13, 0
+# CHECK: bclr 12, 13
0x4d 0x8d 0x00 0x20
-# CHECK: bclr 12, 14, 0
+# CHECK: bclr 12, 14
0x4d 0x8e 0x00 0x20
-# CHECK: bclr 12, 15, 0
+# CHECK: bclr 12, 15
0x4d 0x8f 0x00 0x20
-# CHECK: bclr 12, 15, 0
+# CHECK: bclr 12, 15
0x4d 0x8f 0x00 0x20
-# CHECK: bclr 12, 16, 0
+# CHECK: bclr 12, 16
0x4d 0x90 0x00 0x20
-# CHECK: bclr 12, 17, 0
+# CHECK: bclr 12, 17
0x4d 0x91 0x00 0x20
-# CHECK: bclr 12, 18, 0
+# CHECK: bclr 12, 18
0x4d 0x92 0x00 0x20
-# CHECK: bclr 12, 19, 0
+# CHECK: bclr 12, 19
0x4d 0x93 0x00 0x20
-# CHECK: bclr 12, 19, 0
+# CHECK: bclr 12, 19
0x4d 0x93 0x00 0x20
-# CHECK: bclr 12, 20, 0
+# CHECK: bclr 12, 20
0x4d 0x94 0x00 0x20
-# CHECK: bclr 12, 21, 0
+# CHECK: bclr 12, 21
0x4d 0x95 0x00 0x20
-# CHECK: bclr 12, 22, 0
+# CHECK: bclr 12, 22
0x4d 0x96 0x00 0x20
-# CHECK: bclr 12, 23, 0
+# CHECK: bclr 12, 23
0x4d 0x97 0x00 0x20
-# CHECK: bclr 12, 23, 0
+# CHECK: bclr 12, 23
0x4d 0x97 0x00 0x20
-# CHECK: bclr 12, 24, 0
+# CHECK: bclr 12, 24
0x4d 0x98 0x00 0x20
-# CHECK: bclr 12, 25, 0
+# CHECK: bclr 12, 25
0x4d 0x99 0x00 0x20
-# CHECK: bclr 12, 26, 0
+# CHECK: bclr 12, 26
0x4d 0x9a 0x00 0x20
-# CHECK: bclr 12, 27, 0
+# CHECK: bclr 12, 27
0x4d 0x9b 0x00 0x20
-# CHECK: bclr 12, 27, 0
+# CHECK: bclr 12, 27
0x4d 0x9b 0x00 0x20
-# CHECK: bclr 12, 28, 0
+# CHECK: bclr 12, 28
0x4d 0x9c 0x00 0x20
-# CHECK: bclr 12, 29, 0
+# CHECK: bclr 12, 29
0x4d 0x9d 0x00 0x20
-# CHECK: bclr 12, 30, 0
+# CHECK: bclr 12, 30
0x4d 0x9e 0x00 0x20
-# CHECK: bclr 12, 31, 0
+# CHECK: bclr 12, 31
0x4d 0x9f 0x00 0x20
-# CHECK: bclr 12, 31, 0
+# CHECK: bclr 12, 31
0x4d 0x9f 0x00 0x20
# CHECK: blr
@@ -164,76 +164,76 @@
# CHECK: bctrl
0x4e 0x80 0x04 0x21
-# CHECK: bclr 12, 2, 0
+# CHECK: bclr 12, 2
0x4d 0x82 0x00 0x20
-# CHECK: bcctr 12, 2, 0
+# CHECK: bcctr 12, 2
0x4d 0x82 0x04 0x20
-# CHECK: bclrl 12, 2, 0
+# CHECK: bclrl 12, 2
0x4d 0x82 0x00 0x21
-# CHECK: bcctrl 12, 2, 0
+# CHECK: bcctrl 12, 2
0x4d 0x82 0x04 0x21
-# CHECK: bclr 15, 2, 0
+# CHECK: bclr 15, 2
0x4d 0xe2 0x00 0x20
-# CHECK: bcctr 15, 2, 0
+# CHECK: bcctr 15, 2
0x4d 0xe2 0x04 0x20
-# CHECK: bclrl 15, 2, 0
+# CHECK: bclrl 15, 2
0x4d 0xe2 0x00 0x21
-# CHECK: bcctrl 15, 2, 0
+# CHECK: bcctrl 15, 2
0x4d 0xe2 0x04 0x21
-# CHECK: bclr 14, 2, 0
+# CHECK: bclr 14, 2
0x4d 0xc2 0x00 0x20
-# CHECK: bcctr 14, 2, 0
+# CHECK: bcctr 14, 2
0x4d 0xc2 0x04 0x20
-# CHECK: bclrl 14, 2, 0
+# CHECK: bclrl 14, 2
0x4d 0xc2 0x00 0x21
-# CHECK: bcctrl 14, 2, 0
+# CHECK: bcctrl 14, 2
0x4d 0xc2 0x04 0x21
-# CHECK: bclr 4, 2, 0
+# CHECK: bclr 4, 2
0x4c 0x82 0x00 0x20
-# CHECK: bcctr 4, 2, 0
+# CHECK: bcctr 4, 2
0x4c 0x82 0x04 0x20
-# CHECK: bclrl 4, 2, 0
+# CHECK: bclrl 4, 2
0x4c 0x82 0x00 0x21
-# CHECK: bcctrl 4, 2, 0
+# CHECK: bcctrl 4, 2
0x4c 0x82 0x04 0x21
-# CHECK: bclr 7, 2, 0
+# CHECK: bclr 7, 2
0x4c 0xe2 0x00 0x20
-# CHECK: bcctr 7, 2, 0
+# CHECK: bcctr 7, 2
0x4c 0xe2 0x04 0x20
-# CHECK: bclrl 7, 2, 0
+# CHECK: bclrl 7, 2
0x4c 0xe2 0x00 0x21
-# CHECK: bcctrl 7, 2, 0
+# CHECK: bcctrl 7, 2
0x4c 0xe2 0x04 0x21
-# CHECK: bclr 6, 2, 0
+# CHECK: bclr 6, 2
0x4c 0xc2 0x00 0x20
-# CHECK: bcctr 6, 2, 0
+# CHECK: bcctr 6, 2
0x4c 0xc2 0x04 0x20
-# CHECK: bclrl 6, 2, 0
+# CHECK: bclrl 6, 2
0x4c 0xc2 0x00 0x21
-# CHECK: bcctrl 6, 2, 0
+# CHECK: bcctrl 6, 2
0x4c 0xc2 0x04 0x21
# CHECK: bdnzlr
@@ -254,16 +254,16 @@
# CHECK: bdnzlrl-
0x4f 0x00 0x00 0x21
-# CHECK: bclr 8, 2, 0
+# CHECK: bclr 8, 2
0x4d 0x02 0x00 0x20
-# CHECK: bclrl 8, 2, 0
+# CHECK: bclrl 8, 2
0x4d 0x02 0x00 0x21
-# CHECK: bclr 0, 2, 0
+# CHECK: bclr 0, 2
0x4c 0x02 0x00 0x20
-# CHECK: bclrl 0, 2, 0
+# CHECK: bclrl 0, 2
0x4c 0x02 0x00 0x21
# CHECK: bdzlr
@@ -284,1168 +284,1168 @@
# CHECK: bdzlrl-
0x4f 0x40 0x00 0x21
-# CHECK: bclr 10, 2, 0
+# CHECK: bclr 10, 2
0x4d 0x42 0x00 0x20
-# CHECK: bclrl 10, 2, 0
+# CHECK: bclrl 10, 2
0x4d 0x42 0x00 0x21
-# CHECK: bclr 2, 2, 0
+# CHECK: bclr 2, 2
0x4c 0x42 0x00 0x20
-# CHECK: bclrl 2, 2, 0
+# CHECK: bclrl 2, 2
0x4c 0x42 0x00 0x21
# FIXME: decode as bltlr 2
-# CHECK: bclr 12, 8, 0
+# CHECK: bclr 12, 8
0x4d 0x88 0x00 0x20
# FIXME: decode as bltlr 0
-# CHECK: bclr 12, 0, 0
+# CHECK: bclr 12, 0
0x4d 0x80 0x00 0x20
# FIXME: decode as bltctr 2
-# CHECK: bcctr 12, 8, 0
+# CHECK: bcctr 12, 8
0x4d 0x88 0x04 0x20
# FIXME: decode as bltctr 0
-# CHECK: bcctr 12, 0, 0
+# CHECK: bcctr 12, 0
0x4d 0x80 0x04 0x20
# FIXME: decode as bltlrl 2
-# CHECK: bclrl 12, 8, 0
+# CHECK: bclrl 12, 8
0x4d 0x88 0x00 0x21
# FIXME: decode as bltlrl 0
-# CHECK: bclrl 12, 0, 0
+# CHECK: bclrl 12, 0
0x4d 0x80 0x00 0x21
# FIXME: decode as bltctrl 2
-# CHECK: bcctrl 12, 8, 0
+# CHECK: bcctrl 12, 8
0x4d 0x88 0x04 0x21
# FIXME: decode as bltctrl 0
-# CHECK: bcctrl 12, 0, 0
+# CHECK: bcctrl 12, 0
0x4d 0x80 0x04 0x21
# FIXME: decode as bltlr+ 2
-# CHECK: bclr 15, 8, 0
+# CHECK: bclr 15, 8
0x4d 0xe8 0x00 0x20
# FIXME: decode as bltlr+ 0
-# CHECK: bclr 15, 0, 0
+# CHECK: bclr 15, 0
0x4d 0xe0 0x00 0x20
# FIXME: decode as bltctr+ 2
-# CHECK: bcctr 15, 8, 0
+# CHECK: bcctr 15, 8
0x4d 0xe8 0x04 0x20
# FIXME: decode as bltctr+ 0
-# CHECK: bcctr 15, 0, 0
+# CHECK: bcctr 15, 0
0x4d 0xe0 0x04 0x20
# FIXME: decode as bltlrl+ 2
-# CHECK: bclrl 15, 8, 0
+# CHECK: bclrl 15, 8
0x4d 0xe8 0x00 0x21
# FIXME: decode as bltlrl+ 0
-# CHECK: bclrl 15, 0, 0
+# CHECK: bclrl 15, 0
0x4d 0xe0 0x00 0x21
# FIXME: decode as bltctrl+ 2
-# CHECK: bcctrl 15, 8, 0
+# CHECK: bcctrl 15, 8
0x4d 0xe8 0x04 0x21
# FIXME: decode as bltctrl+ 0
-# CHECK: bcctrl 15, 0, 0
+# CHECK: bcctrl 15, 0
0x4d 0xe0 0x04 0x21
# FIXME: decode as bltlr- 2
-# CHECK: bclr 14, 8, 0
+# CHECK: bclr 14, 8
0x4d 0xc8 0x00 0x20
# FIXME: decode as bltlr- 0
-# CHECK: bclr 14, 0, 0
+# CHECK: bclr 14, 0
0x4d 0xc0 0x00 0x20
# FIXME: decode as bltctr- 2
-# CHECK: bcctr 14, 8, 0
+# CHECK: bcctr 14, 8
0x4d 0xc8 0x04 0x20
# FIXME: decode as bltctr- 0
-# CHECK: bcctr 14, 0, 0
+# CHECK: bcctr 14, 0
0x4d 0xc0 0x04 0x20
# FIXME: decode as bltlrl- 2
-# CHECK: bclrl 14, 8, 0
+# CHECK: bclrl 14, 8
0x4d 0xc8 0x00 0x21
# FIXME: decode as bltlrl- 0
-# CHECK: bclrl 14, 0, 0
+# CHECK: bclrl 14, 0
0x4d 0xc0 0x00 0x21
# FIXME: decode as bltctrl- 2
-# CHECK: bcctrl 14, 8, 0
+# CHECK: bcctrl 14, 8
0x4d 0xc8 0x04 0x21
# FIXME: decode as bltctrl- 0
-# CHECK: bcctrl 14, 0, 0
+# CHECK: bcctrl 14, 0
0x4d 0xc0 0x04 0x21
# FIXME: decode as blelr 2
-# CHECK: bclr 4, 9, 0
+# CHECK: bclr 4, 9
0x4c 0x89 0x00 0x20
# FIXME: decode as blelr 0
-# CHECK: bclr 4, 1, 0
+# CHECK: bclr 4, 1
0x4c 0x81 0x00 0x20
# FIXME: decode as blectr 2
-# CHECK: bcctr 4, 9, 0
+# CHECK: bcctr 4, 9
0x4c 0x89 0x04 0x20
# FIXME: decode as blectr 0
-# CHECK: bcctr 4, 1, 0
+# CHECK: bcctr 4, 1
0x4c 0x81 0x04 0x20
# FIXME: decode as blelrl 2
-# CHECK: bclrl 4, 9, 0
+# CHECK: bclrl 4, 9
0x4c 0x89 0x00 0x21
# FIXME: decode as blelrl 0
-# CHECK: bclrl 4, 1, 0
+# CHECK: bclrl 4, 1
0x4c 0x81 0x00 0x21
# FIXME: decode as blectrl 2
-# CHECK: bcctrl 4, 9, 0
+# CHECK: bcctrl 4, 9
0x4c 0x89 0x04 0x21
# FIXME: decode as blectrl 0
-# CHECK: bcctrl 4, 1, 0
+# CHECK: bcctrl 4, 1
0x4c 0x81 0x04 0x21
# FIXME: decode as blelr+ 2
-# CHECK: bclr 7, 9, 0
+# CHECK: bclr 7, 9
0x4c 0xe9 0x00 0x20
# FIXME: decode as blelr+ 0
-# CHECK: bclr 7, 1, 0
+# CHECK: bclr 7, 1
0x4c 0xe1 0x00 0x20
# FIXME: decode as blectr+ 2
-# CHECK: bcctr 7, 9, 0
+# CHECK: bcctr 7, 9
0x4c 0xe9 0x04 0x20
# FIXME: decode as blectr+ 0
-# CHECK: bcctr 7, 1, 0
+# CHECK: bcctr 7, 1
0x4c 0xe1 0x04 0x20
# FIXME: decode as blelrl+ 2
-# CHECK: bclrl 7, 9, 0
+# CHECK: bclrl 7, 9
0x4c 0xe9 0x00 0x21
# FIXME: decode as blelrl+ 0
-# CHECK: bclrl 7, 1, 0
+# CHECK: bclrl 7, 1
0x4c 0xe1 0x00 0x21
# FIXME: decode as blectrl+ 2
-# CHECK: bcctrl 7, 9, 0
+# CHECK: bcctrl 7, 9
0x4c 0xe9 0x04 0x21
# FIXME: decode as blectrl+ 0
-# CHECK: bcctrl 7, 1, 0
+# CHECK: bcctrl 7, 1
0x4c 0xe1 0x04 0x21
# FIXME: decode as blelr- 2
-# CHECK: bclr 6, 9, 0
+# CHECK: bclr 6, 9
0x4c 0xc9 0x00 0x20
# FIXME: decode as blelr- 0
-# CHECK: bclr 6, 1, 0
+# CHECK: bclr 6, 1
0x4c 0xc1 0x00 0x20
# FIXME: decode as blectr- 2
-# CHECK: bcctr 6, 9, 0
+# CHECK: bcctr 6, 9
0x4c 0xc9 0x04 0x20
# FIXME: decode as blectr- 0
-# CHECK: bcctr 6, 1, 0
+# CHECK: bcctr 6, 1
0x4c 0xc1 0x04 0x20
# FIXME: decode as blelrl- 2
-# CHECK: bclrl 6, 9, 0
+# CHECK: bclrl 6, 9
0x4c 0xc9 0x00 0x21
# FIXME: decode as blelrl- 0
-# CHECK: bclrl 6, 1, 0
+# CHECK: bclrl 6, 1
0x4c 0xc1 0x00 0x21
# FIXME: decode as blectrl- 2
-# CHECK: bcctrl 6, 9, 0
+# CHECK: bcctrl 6, 9
0x4c 0xc9 0x04 0x21
# FIXME: decode as blectrl- 0
-# CHECK: bcctrl 6, 1, 0
+# CHECK: bcctrl 6, 1
0x4c 0xc1 0x04 0x21
# FIXME: decode as beqlr 2
-# CHECK: bclr 12, 10, 0
+# CHECK: bclr 12, 10
0x4d 0x8a 0x00 0x20
# FIXME: decode as beqlr 0
-# CHECK: bclr 12, 2, 0
+# CHECK: bclr 12, 2
0x4d 0x82 0x00 0x20
# FIXME: decode as beqctr 2
-# CHECK: bcctr 12, 10, 0
+# CHECK: bcctr 12, 10
0x4d 0x8a 0x04 0x20
# FIXME: decode as beqctr 0
-# CHECK: bcctr 12, 2, 0
+# CHECK: bcctr 12, 2
0x4d 0x82 0x04 0x20
# FIXME: decode as beqlrl 2
-# CHECK: bclrl 12, 10, 0
+# CHECK: bclrl 12, 10
0x4d 0x8a 0x00 0x21
# FIXME: decode as beqlrl 0
-# CHECK: bclrl 12, 2, 0
+# CHECK: bclrl 12, 2
0x4d 0x82 0x00 0x21
# FIXME: decode as beqctrl 2
-# CHECK: bcctrl 12, 10, 0
+# CHECK: bcctrl 12, 10
0x4d 0x8a 0x04 0x21
# FIXME: decode as beqctrl 0
-# CHECK: bcctrl 12, 2, 0
+# CHECK: bcctrl 12, 2
0x4d 0x82 0x04 0x21
# FIXME: decode as beqlr+ 2
-# CHECK: bclr 15, 10, 0
+# CHECK: bclr 15, 10
0x4d 0xea 0x00 0x20
# FIXME: decode as beqlr+ 0
-# CHECK: bclr 15, 2, 0
+# CHECK: bclr 15, 2
0x4d 0xe2 0x00 0x20
# FIXME: decode as beqctr+ 2
-# CHECK: bcctr 15, 10, 0
+# CHECK: bcctr 15, 10
0x4d 0xea 0x04 0x20
# FIXME: decode as beqctr+ 0
-# CHECK: bcctr 15, 2, 0
+# CHECK: bcctr 15, 2
0x4d 0xe2 0x04 0x20
# FIXME: decode as beqlrl+ 2
-# CHECK: bclrl 15, 10, 0
+# CHECK: bclrl 15, 10
0x4d 0xea 0x00 0x21
# FIXME: decode as beqlrl+ 0
-# CHECK: bclrl 15, 2, 0
+# CHECK: bclrl 15, 2
0x4d 0xe2 0x00 0x21
# FIXME: decode as beqctrl+ 2
-# CHECK: bcctrl 15, 10, 0
+# CHECK: bcctrl 15, 10
0x4d 0xea 0x04 0x21
# FIXME: decode as beqctrl+ 0
-# CHECK: bcctrl 15, 2, 0
+# CHECK: bcctrl 15, 2
0x4d 0xe2 0x04 0x21
# FIXME: decode as beqlr- 2
-# CHECK: bclr 14, 10, 0
+# CHECK: bclr 14, 10
0x4d 0xca 0x00 0x20
# FIXME: decode as beqlr- 0
-# CHECK: bclr 14, 2, 0
+# CHECK: bclr 14, 2
0x4d 0xc2 0x00 0x20
# FIXME: decode as beqctr- 2
-# CHECK: bcctr 14, 10, 0
+# CHECK: bcctr 14, 10
0x4d 0xca 0x04 0x20
# FIXME: decode as beqctr- 0
-# CHECK: bcctr 14, 2, 0
+# CHECK: bcctr 14, 2
0x4d 0xc2 0x04 0x20
# FIXME: decode as beqlrl- 2
-# CHECK: bclrl 14, 10, 0
+# CHECK: bclrl 14, 10
0x4d 0xca 0x00 0x21
# FIXME: decode as beqlrl- 0
-# CHECK: bclrl 14, 2, 0
+# CHECK: bclrl 14, 2
0x4d 0xc2 0x00 0x21
# FIXME: decode as beqctrl- 2
-# CHECK: bcctrl 14, 10, 0
+# CHECK: bcctrl 14, 10
0x4d 0xca 0x04 0x21
# FIXME: decode as beqctrl- 0
-# CHECK: bcctrl 14, 2, 0
+# CHECK: bcctrl 14, 2
0x4d 0xc2 0x04 0x21
# FIXME: decode as bgelr 2
-# CHECK: bclr 4, 8, 0
+# CHECK: bclr 4, 8
0x4c 0x88 0x00 0x20
# FIXME: decode as bgelr 0
-# CHECK: bclr 4, 0, 0
+# CHECK: bclr 4, 0
0x4c 0x80 0x00 0x20
# FIXME: decode as bgectr 2
-# CHECK: bcctr 4, 8, 0
+# CHECK: bcctr 4, 8
0x4c 0x88 0x04 0x20
# FIXME: decode as bgectr 0
-# CHECK: bcctr 4, 0, 0
+# CHECK: bcctr 4, 0
0x4c 0x80 0x04 0x20
# FIXME: decode as bgelrl 2
-# CHECK: bclrl 4, 8, 0
+# CHECK: bclrl 4, 8
0x4c 0x88 0x00 0x21
# FIXME: decode as bgelrl 0
-# CHECK: bclrl 4, 0, 0
+# CHECK: bclrl 4, 0
0x4c 0x80 0x00 0x21
# FIXME: decode as bgectrl 2
-# CHECK: bcctrl 4, 8, 0
+# CHECK: bcctrl 4, 8
0x4c 0x88 0x04 0x21
# FIXME: decode as bgectrl 0
-# CHECK: bcctrl 4, 0, 0
+# CHECK: bcctrl 4, 0
0x4c 0x80 0x04 0x21
# FIXME: decode as bgelr+ 2
-# CHECK: bclr 7, 8, 0
+# CHECK: bclr 7, 8
0x4c 0xe8 0x00 0x20
# FIXME: decode as bgelr+ 0
-# CHECK: bclr 7, 0, 0
+# CHECK: bclr 7, 0
0x4c 0xe0 0x00 0x20
# FIXME: decode as bgectr+ 2
-# CHECK: bcctr 7, 8, 0
+# CHECK: bcctr 7, 8
0x4c 0xe8 0x04 0x20
# FIXME: decode as bgectr+ 0
-# CHECK: bcctr 7, 0, 0
+# CHECK: bcctr 7, 0
0x4c 0xe0 0x04 0x20
# FIXME: decode as bgelrl+ 2
-# CHECK: bclrl 7, 8, 0
+# CHECK: bclrl 7, 8
0x4c 0xe8 0x00 0x21
# FIXME: decode as bgelrl+ 0
-# CHECK: bclrl 7, 0, 0
+# CHECK: bclrl 7, 0
0x4c 0xe0 0x00 0x21
# FIXME: decode as bgectrl+ 2
-# CHECK: bcctrl 7, 8, 0
+# CHECK: bcctrl 7, 8
0x4c 0xe8 0x04 0x21
# FIXME: decode as bgectrl+ 0
-# CHECK: bcctrl 7, 0, 0
+# CHECK: bcctrl 7, 0
0x4c 0xe0 0x04 0x21
# FIXME: decode as bgelr- 2
-# CHECK: bclr 6, 8, 0
+# CHECK: bclr 6, 8
0x4c 0xc8 0x00 0x20
# FIXME: decode as bgelr- 0
-# CHECK: bclr 6, 0, 0
+# CHECK: bclr 6, 0
0x4c 0xc0 0x00 0x20
# FIXME: decode as bgectr- 2
-# CHECK: bcctr 6, 8, 0
+# CHECK: bcctr 6, 8
0x4c 0xc8 0x04 0x20
# FIXME: decode as bgectr- 0
-# CHECK: bcctr 6, 0, 0
+# CHECK: bcctr 6, 0
0x4c 0xc0 0x04 0x20
# FIXME: decode as bgelrl- 2
-# CHECK: bclrl 6, 8, 0
+# CHECK: bclrl 6, 8
0x4c 0xc8 0x00 0x21
# FIXME: decode as bgelrl- 0
-# CHECK: bclrl 6, 0, 0
+# CHECK: bclrl 6, 0
0x4c 0xc0 0x00 0x21
# FIXME: decode as bgectrl- 2
-# CHECK: bcctrl 6, 8, 0
+# CHECK: bcctrl 6, 8
0x4c 0xc8 0x04 0x21
# FIXME: decode as bgectrl- 0
-# CHECK: bcctrl 6, 0, 0
+# CHECK: bcctrl 6, 0
0x4c 0xc0 0x04 0x21
# FIXME: decode as bgtlr 2
-# CHECK: bclr 12, 9, 0
+# CHECK: bclr 12, 9
0x4d 0x89 0x00 0x20
# FIXME: decode as bgtlr 0
-# CHECK: bclr 12, 1, 0
+# CHECK: bclr 12, 1
0x4d 0x81 0x00 0x20
# FIXME: decode as bgtctr 2
-# CHECK: bcctr 12, 9, 0
+# CHECK: bcctr 12, 9
0x4d 0x89 0x04 0x20
# FIXME: decode as bgtctr 0
-# CHECK: bcctr 12, 1, 0
+# CHECK: bcctr 12, 1
0x4d 0x81 0x04 0x20
# FIXME: decode as bgtlrl 2
-# CHECK: bclrl 12, 9, 0
+# CHECK: bclrl 12, 9
0x4d 0x89 0x00 0x21
# FIXME: decode as bgtlrl 0
-# CHECK: bclrl 12, 1, 0
+# CHECK: bclrl 12, 1
0x4d 0x81 0x00 0x21
# FIXME: decode as bgtctrl 2
-# CHECK: bcctrl 12, 9, 0
+# CHECK: bcctrl 12, 9
0x4d 0x89 0x04 0x21
# FIXME: decode as bgtctrl 0
-# CHECK: bcctrl 12, 1, 0
+# CHECK: bcctrl 12, 1
0x4d 0x81 0x04 0x21
# FIXME: decode as bgtlr+ 2
-# CHECK: bclr 15, 9, 0
+# CHECK: bclr 15, 9
0x4d 0xe9 0x00 0x20
# FIXME: decode as bgtlr+ 0
-# CHECK: bclr 15, 1, 0
+# CHECK: bclr 15, 1
0x4d 0xe1 0x00 0x20
# FIXME: decode as bgtctr+ 2
-# CHECK: bcctr 15, 9, 0
+# CHECK: bcctr 15, 9
0x4d 0xe9 0x04 0x20
# FIXME: decode as bgtctr+ 0
-# CHECK: bcctr 15, 1, 0
+# CHECK: bcctr 15, 1
0x4d 0xe1 0x04 0x20
# FIXME: decode as bgtlrl+ 2
-# CHECK: bclrl 15, 9, 0
+# CHECK: bclrl 15, 9
0x4d 0xe9 0x00 0x21
# FIXME: decode as bgtlrl+ 0
-# CHECK: bclrl 15, 1, 0
+# CHECK: bclrl 15, 1
0x4d 0xe1 0x00 0x21
# FIXME: decode as bgtctrl+ 2
-# CHECK: bcctrl 15, 9, 0
+# CHECK: bcctrl 15, 9
0x4d 0xe9 0x04 0x21
# FIXME: decode as bgtctrl+ 0
-# CHECK: bcctrl 15, 1, 0
+# CHECK: bcctrl 15, 1
0x4d 0xe1 0x04 0x21
# FIXME: decode as bgtlr- 2
-# CHECK: bclr 14, 9, 0
+# CHECK: bclr 14, 9
0x4d 0xc9 0x00 0x20
# FIXME: decode as bgtlr- 0
-# CHECK: bclr 14, 1, 0
+# CHECK: bclr 14, 1
0x4d 0xc1 0x00 0x20
# FIXME: decode as bgtctr- 2
-# CHECK: bcctr 14, 9, 0
+# CHECK: bcctr 14, 9
0x4d 0xc9 0x04 0x20
# FIXME: decode as bgtctr- 0
-# CHECK: bcctr 14, 1, 0
+# CHECK: bcctr 14, 1
0x4d 0xc1 0x04 0x20
# FIXME: decode as bgtlrl- 2
-# CHECK: bclrl 14, 9, 0
+# CHECK: bclrl 14, 9
0x4d 0xc9 0x00 0x21
# FIXME: decode as bgtlrl- 0
-# CHECK: bclrl 14, 1, 0
+# CHECK: bclrl 14, 1
0x4d 0xc1 0x00 0x21
# FIXME: decode as bgtctrl- 2
-# CHECK: bcctrl 14, 9, 0
+# CHECK: bcctrl 14, 9
0x4d 0xc9 0x04 0x21
# FIXME: decode as bgtctrl- 0
-# CHECK: bcctrl 14, 1, 0
+# CHECK: bcctrl 14, 1
0x4d 0xc1 0x04 0x21
# FIXME: decode as bgelr 2
-# CHECK: bclr 4, 8, 0
+# CHECK: bclr 4, 8
0x4c 0x88 0x00 0x20
# FIXME: decode as bgelr 0
-# CHECK: bclr 4, 0, 0
+# CHECK: bclr 4, 0
0x4c 0x80 0x00 0x20
# FIXME: decode as bgectr 2
-# CHECK: bcctr 4, 8, 0
+# CHECK: bcctr 4, 8
0x4c 0x88 0x04 0x20
# FIXME: decode as bgectr 0
-# CHECK: bcctr 4, 0, 0
+# CHECK: bcctr 4, 0
0x4c 0x80 0x04 0x20
# FIXME: decode as bgelrl 2
-# CHECK: bclrl 4, 8, 0
+# CHECK: bclrl 4, 8
0x4c 0x88 0x00 0x21
# FIXME: decode as bgelrl 0
-# CHECK: bclrl 4, 0, 0
+# CHECK: bclrl 4, 0
0x4c 0x80 0x00 0x21
# FIXME: decode as bgectrl 2
-# CHECK: bcctrl 4, 8, 0
+# CHECK: bcctrl 4, 8
0x4c 0x88 0x04 0x21
# FIXME: decode as bgectrl 0
-# CHECK: bcctrl 4, 0, 0
+# CHECK: bcctrl 4, 0
0x4c 0x80 0x04 0x21
# FIXME: decode as bgelr+ 2
-# CHECK: bclr 7, 8, 0
+# CHECK: bclr 7, 8
0x4c 0xe8 0x00 0x20
# FIXME: decode as bgelr+ 0
-# CHECK: bclr 7, 0, 0
+# CHECK: bclr 7, 0
0x4c 0xe0 0x00 0x20
# FIXME: decode as bgectr+ 2
-# CHECK: bcctr 7, 8, 0
+# CHECK: bcctr 7, 8
0x4c 0xe8 0x04 0x20
# FIXME: decode as bgectr+ 0
-# CHECK: bcctr 7, 0, 0
+# CHECK: bcctr 7, 0
0x4c 0xe0 0x04 0x20
# FIXME: decode as bgelrl+ 2
-# CHECK: bclrl 7, 8, 0
+# CHECK: bclrl 7, 8
0x4c 0xe8 0x00 0x21
# FIXME: decode as bgelrl+ 0
-# CHECK: bclrl 7, 0, 0
+# CHECK: bclrl 7, 0
0x4c 0xe0 0x00 0x21
# FIXME: decode as bgectrl+ 2
-# CHECK: bcctrl 7, 8, 0
+# CHECK: bcctrl 7, 8
0x4c 0xe8 0x04 0x21
# FIXME: decode as bgectrl+ 0
-# CHECK: bcctrl 7, 0, 0
+# CHECK: bcctrl 7, 0
0x4c 0xe0 0x04 0x21
# FIXME: decode as bgelr- 2
-# CHECK: bclr 6, 8, 0
+# CHECK: bclr 6, 8
0x4c 0xc8 0x00 0x20
# FIXME: decode as bgelr- 0
-# CHECK: bclr 6, 0, 0
+# CHECK: bclr 6, 0
0x4c 0xc0 0x00 0x20
# FIXME: decode as bgectr- 2
-# CHECK: bcctr 6, 8, 0
+# CHECK: bcctr 6, 8
0x4c 0xc8 0x04 0x20
# FIXME: decode as bgectr- 0
-# CHECK: bcctr 6, 0, 0
+# CHECK: bcctr 6, 0
0x4c 0xc0 0x04 0x20
# FIXME: decode as bgelrl- 2
-# CHECK: bclrl 6, 8, 0
+# CHECK: bclrl 6, 8
0x4c 0xc8 0x00 0x21
# FIXME: decode as bgelrl- 0
-# CHECK: bclrl 6, 0, 0
+# CHECK: bclrl 6, 0
0x4c 0xc0 0x00 0x21
# FIXME: decode as bgectrl- 2
-# CHECK: bcctrl 6, 8, 0
+# CHECK: bcctrl 6, 8
0x4c 0xc8 0x04 0x21
# FIXME: decode as bgectrl- 0
-# CHECK: bcctrl 6, 0, 0
+# CHECK: bcctrl 6, 0
0x4c 0xc0 0x04 0x21
# FIXME: decode as bnelr 2
-# CHECK: bclr 4, 10, 0
+# CHECK: bclr 4, 10
0x4c 0x8a 0x00 0x20
# FIXME: decode as bnelr 0
-# CHECK: bclr 4, 2, 0
+# CHECK: bclr 4, 2
0x4c 0x82 0x00 0x20
# FIXME: decode as bnectr 2
-# CHECK: bcctr 4, 10, 0
+# CHECK: bcctr 4, 10
0x4c 0x8a 0x04 0x20
# FIXME: decode as bnectr 0
-# CHECK: bcctr 4, 2, 0
+# CHECK: bcctr 4, 2
0x4c 0x82 0x04 0x20
# FIXME: decode as bnelrl 2
-# CHECK: bclrl 4, 10, 0
+# CHECK: bclrl 4, 10
0x4c 0x8a 0x00 0x21
# FIXME: decode as bnelrl 0
-# CHECK: bclrl 4, 2, 0
+# CHECK: bclrl 4, 2
0x4c 0x82 0x00 0x21
# FIXME: decode as bnectrl 2
-# CHECK: bcctrl 4, 10, 0
+# CHECK: bcctrl 4, 10
0x4c 0x8a 0x04 0x21
# FIXME: decode as bnectrl 0
-# CHECK: bcctrl 4, 2, 0
+# CHECK: bcctrl 4, 2
0x4c 0x82 0x04 0x21
# FIXME: decode as bnelr+ 2
-# CHECK: bclr 7, 10, 0
+# CHECK: bclr 7, 10
0x4c 0xea 0x00 0x20
# FIXME: decode as bnelr+ 0
-# CHECK: bclr 7, 2, 0
+# CHECK: bclr 7, 2
0x4c 0xe2 0x00 0x20
# FIXME: decode as bnectr+ 2
-# CHECK: bcctr 7, 10, 0
+# CHECK: bcctr 7, 10
0x4c 0xea 0x04 0x20
# FIXME: decode as bnectr+ 0
-# CHECK: bcctr 7, 2, 0
+# CHECK: bcctr 7, 2
0x4c 0xe2 0x04 0x20
# FIXME: decode as bnelrl+ 2
-# CHECK: bclrl 7, 10, 0
+# CHECK: bclrl 7, 10
0x4c 0xea 0x00 0x21
# FIXME: decode as bnelrl+ 0
-# CHECK: bclrl 7, 2, 0
+# CHECK: bclrl 7, 2
0x4c 0xe2 0x00 0x21
# FIXME: decode as bnectrl+ 2
-# CHECK: bcctrl 7, 10, 0
+# CHECK: bcctrl 7, 10
0x4c 0xea 0x04 0x21
# FIXME: decode as bnectrl+ 0
-# CHECK: bcctrl 7, 2, 0
+# CHECK: bcctrl 7, 2
0x4c 0xe2 0x04 0x21
# FIXME: decode as bnelr- 2
-# CHECK: bclr 6, 10, 0
+# CHECK: bclr 6, 10
0x4c 0xca 0x00 0x20
# FIXME: decode as bnelr- 0
-# CHECK: bclr 6, 2, 0
+# CHECK: bclr 6, 2
0x4c 0xc2 0x00 0x20
# FIXME: decode as bnectr- 2
-# CHECK: bcctr 6, 10, 0
+# CHECK: bcctr 6, 10
0x4c 0xca 0x04 0x20
# FIXME: decode as bnectr- 0
-# CHECK: bcctr 6, 2, 0
+# CHECK: bcctr 6, 2
0x4c 0xc2 0x04 0x20
# FIXME: decode as bnelrl- 2
-# CHECK: bclrl 6, 10, 0
+# CHECK: bclrl 6, 10
0x4c 0xca 0x00 0x21
# FIXME: decode as bnelrl- 0
-# CHECK: bclrl 6, 2, 0
+# CHECK: bclrl 6, 2
0x4c 0xc2 0x00 0x21
# FIXME: decode as bnectrl- 2
-# CHECK: bcctrl 6, 10, 0
+# CHECK: bcctrl 6, 10
0x4c 0xca 0x04 0x21
# FIXME: decode as bnectrl- 0
-# CHECK: bcctrl 6, 2, 0
+# CHECK: bcctrl 6, 2
0x4c 0xc2 0x04 0x21
# FIXME: decode as blelr 2
-# CHECK: bclr 4, 9, 0
+# CHECK: bclr 4, 9
0x4c 0x89 0x00 0x20
# FIXME: decode as blelr 0
-# CHECK: bclr 4, 1, 0
+# CHECK: bclr 4, 1
0x4c 0x81 0x00 0x20
# FIXME: decode as blectr 2
-# CHECK: bcctr 4, 9, 0
+# CHECK: bcctr 4, 9
0x4c 0x89 0x04 0x20
# FIXME: decode as blectr 0
-# CHECK: bcctr 4, 1, 0
+# CHECK: bcctr 4, 1
0x4c 0x81 0x04 0x20
# FIXME: decode as blelrl 2
-# CHECK: bclrl 4, 9, 0
+# CHECK: bclrl 4, 9
0x4c 0x89 0x00 0x21
# FIXME: decode as blelrl 0
-# CHECK: bclrl 4, 1, 0
+# CHECK: bclrl 4, 1
0x4c 0x81 0x00 0x21
# FIXME: decode as blectrl 2
-# CHECK: bcctrl 4, 9, 0
+# CHECK: bcctrl 4, 9
0x4c 0x89 0x04 0x21
# FIXME: decode as blectrl 0
-# CHECK: bcctrl 4, 1, 0
+# CHECK: bcctrl 4, 1
0x4c 0x81 0x04 0x21
# FIXME: decode as blelr+ 2
-# CHECK: bclr 7, 9, 0
+# CHECK: bclr 7, 9
0x4c 0xe9 0x00 0x20
# FIXME: decode as blelr+ 0
-# CHECK: bclr 7, 1, 0
+# CHECK: bclr 7, 1
0x4c 0xe1 0x00 0x20
# FIXME: decode as blectr+ 2
-# CHECK: bcctr 7, 9, 0
+# CHECK: bcctr 7, 9
0x4c 0xe9 0x04 0x20
# FIXME: decode as blectr+ 0
-# CHECK: bcctr 7, 1, 0
+# CHECK: bcctr 7, 1
0x4c 0xe1 0x04 0x20
# FIXME: decode as blelrl+ 2
-# CHECK: bclrl 7, 9, 0
+# CHECK: bclrl 7, 9
0x4c 0xe9 0x00 0x21
# FIXME: decode as blelrl+ 0
-# CHECK: bclrl 7, 1, 0
+# CHECK: bclrl 7, 1
0x4c 0xe1 0x00 0x21
# FIXME: decode as blectrl+ 2
-# CHECK: bcctrl 7, 9, 0
+# CHECK: bcctrl 7, 9
0x4c 0xe9 0x04 0x21
# FIXME: decode as blectrl+ 0
-# CHECK: bcctrl 7, 1, 0
+# CHECK: bcctrl 7, 1
0x4c 0xe1 0x04 0x21
# FIXME: decode as blelr- 2
-# CHECK: bclr 6, 9, 0
+# CHECK: bclr 6, 9
0x4c 0xc9 0x00 0x20
# FIXME: decode as blelr- 0
-# CHECK: bclr 6, 1, 0
+# CHECK: bclr 6, 1
0x4c 0xc1 0x00 0x20
# FIXME: decode as blectr- 2
-# CHECK: bcctr 6, 9, 0
+# CHECK: bcctr 6, 9
0x4c 0xc9 0x04 0x20
# FIXME: decode as blectr- 0
-# CHECK: bcctr 6, 1, 0
+# CHECK: bcctr 6, 1
0x4c 0xc1 0x04 0x20
# FIXME: decode as blelrl- 2
-# CHECK: bclrl 6, 9, 0
+# CHECK: bclrl 6, 9
0x4c 0xc9 0x00 0x21
# FIXME: decode as blelrl- 0
-# CHECK: bclrl 6, 1, 0
+# CHECK: bclrl 6, 1
0x4c 0xc1 0x00 0x21
# FIXME: decode as blectrl- 2
-# CHECK: bcctrl 6, 9, 0
+# CHECK: bcctrl 6, 9
0x4c 0xc9 0x04 0x21
# FIXME: decode as blectrl- 0
-# CHECK: bcctrl 6, 1, 0
+# CHECK: bcctrl 6, 1
0x4c 0xc1 0x04 0x21
# FIXME: decode as bunlr 2
-# CHECK: bclr 12, 11, 0
+# CHECK: bclr 12, 11
0x4d 0x8b 0x00 0x20
# FIXME: decode as bunlr 0
-# CHECK: bclr 12, 3, 0
+# CHECK: bclr 12, 3
0x4d 0x83 0x00 0x20
# FIXME: decode as bunctr 2
-# CHECK: bcctr 12, 11, 0
+# CHECK: bcctr 12, 11
0x4d 0x8b 0x04 0x20
# FIXME: decode as bunctr 0
-# CHECK: bcctr 12, 3, 0
+# CHECK: bcctr 12, 3
0x4d 0x83 0x04 0x20
# FIXME: decode as bunlrl 2
-# CHECK: bclrl 12, 11, 0
+# CHECK: bclrl 12, 11
0x4d 0x8b 0x00 0x21
# FIXME: decode as bunlrl 0
-# CHECK: bclrl 12, 3, 0
+# CHECK: bclrl 12, 3
0x4d 0x83 0x00 0x21
# FIXME: decode as bunctrl 2
-# CHECK: bcctrl 12, 11, 0
+# CHECK: bcctrl 12, 11
0x4d 0x8b 0x04 0x21
# FIXME: decode as bunctrl 0
-# CHECK: bcctrl 12, 3, 0
+# CHECK: bcctrl 12, 3
0x4d 0x83 0x04 0x21
# FIXME: decode as bunlr+ 2
-# CHECK: bclr 15, 11, 0
+# CHECK: bclr 15, 11
0x4d 0xeb 0x00 0x20
# FIXME: decode as bunlr+ 0
-# CHECK: bclr 15, 3, 0
+# CHECK: bclr 15, 3
0x4d 0xe3 0x00 0x20
# FIXME: decode as bunctr+ 2
-# CHECK: bcctr 15, 11, 0
+# CHECK: bcctr 15, 11
0x4d 0xeb 0x04 0x20
# FIXME: decode as bunctr+ 0
-# CHECK: bcctr 15, 3, 0
+# CHECK: bcctr 15, 3
0x4d 0xe3 0x04 0x20
# FIXME: decode as bunlrl+ 2
-# CHECK: bclrl 15, 11, 0
+# CHECK: bclrl 15, 11
0x4d 0xeb 0x00 0x21
# FIXME: decode as bunlrl+ 0
-# CHECK: bclrl 15, 3, 0
+# CHECK: bclrl 15, 3
0x4d 0xe3 0x00 0x21
# FIXME: decode as bunctrl+ 2
-# CHECK: bcctrl 15, 11, 0
+# CHECK: bcctrl 15, 11
0x4d 0xeb 0x04 0x21
# FIXME: decode as bunctrl+ 0
-# CHECK: bcctrl 15, 3, 0
+# CHECK: bcctrl 15, 3
0x4d 0xe3 0x04 0x21
# FIXME: decode as bunlr- 2
-# CHECK: bclr 14, 11, 0
+# CHECK: bclr 14, 11
0x4d 0xcb 0x00 0x20
# FIXME: decode as bunlr- 0
-# CHECK: bclr 14, 3, 0
+# CHECK: bclr 14, 3
0x4d 0xc3 0x00 0x20
# FIXME: decode as bunctr- 2
-# CHECK: bcctr 14, 11, 0
+# CHECK: bcctr 14, 11
0x4d 0xcb 0x04 0x20
# FIXME: decode as bunctr- 0
-# CHECK: bcctr 14, 3, 0
+# CHECK: bcctr 14, 3
0x4d 0xc3 0x04 0x20
# FIXME: decode as bunlrl- 2
-# CHECK: bclrl 14, 11, 0
+# CHECK: bclrl 14, 11
0x4d 0xcb 0x00 0x21
# FIXME: decode as bunlrl- 0
-# CHECK: bclrl 14, 3, 0
+# CHECK: bclrl 14, 3
0x4d 0xc3 0x00 0x21
# FIXME: decode as bunctrl- 2
-# CHECK: bcctrl 14, 11, 0
+# CHECK: bcctrl 14, 11
0x4d 0xcb 0x04 0x21
# FIXME: decode as bunctrl- 0
-# CHECK: bcctrl 14, 3, 0
+# CHECK: bcctrl 14, 3
0x4d 0xc3 0x04 0x21
# FIXME: decode as bnulr 2
-# CHECK: bclr 4, 11, 0
+# CHECK: bclr 4, 11
0x4c 0x8b 0x00 0x20
# FIXME: decode as bnulr 0
-# CHECK: bclr 4, 3, 0
+# CHECK: bclr 4, 3
0x4c 0x83 0x00 0x20
# FIXME: decode as bnuctr 2
-# CHECK: bcctr 4, 11, 0
+# CHECK: bcctr 4, 11
0x4c 0x8b 0x04 0x20
# FIXME: decode as bnuctr 0
-# CHECK: bcctr 4, 3, 0
+# CHECK: bcctr 4, 3
0x4c 0x83 0x04 0x20
# FIXME: decode as bnulrl 2
-# CHECK: bclrl 4, 11, 0
+# CHECK: bclrl 4, 11
0x4c 0x8b 0x00 0x21
# FIXME: decode as bnulrl 0
-# CHECK: bclrl 4, 3, 0
+# CHECK: bclrl 4, 3
0x4c 0x83 0x00 0x21
# FIXME: decode as bnuctrl 2
-# CHECK: bcctrl 4, 11, 0
+# CHECK: bcctrl 4, 11
0x4c 0x8b 0x04 0x21
# FIXME: decode as bnuctrl 0
-# CHECK: bcctrl 4, 3, 0
+# CHECK: bcctrl 4, 3
0x4c 0x83 0x04 0x21
# FIXME: decode as bnulr+ 2
-# CHECK: bclr 7, 11, 0
+# CHECK: bclr 7, 11
0x4c 0xeb 0x00 0x20
# FIXME: decode as bnulr+ 0
-# CHECK: bclr 7, 3, 0
+# CHECK: bclr 7, 3
0x4c 0xe3 0x00 0x20
# FIXME: decode as bnuctr+ 2
-# CHECK: bcctr 7, 11, 0
+# CHECK: bcctr 7, 11
0x4c 0xeb 0x04 0x20
# FIXME: decode as bnuctr+ 0
-# CHECK: bcctr 7, 3, 0
+# CHECK: bcctr 7, 3
0x4c 0xe3 0x04 0x20
# FIXME: decode as bnulrl+ 2
-# CHECK: bclrl 7, 11, 0
+# CHECK: bclrl 7, 11
0x4c 0xeb 0x00 0x21
# FIXME: decode as bnulrl+ 0
-# CHECK: bclrl 7, 3, 0
+# CHECK: bclrl 7, 3
0x4c 0xe3 0x00 0x21
# FIXME: decode as bnuctrl+ 2
-# CHECK: bcctrl 7, 11, 0
+# CHECK: bcctrl 7, 11
0x4c 0xeb 0x04 0x21
# FIXME: decode as bnuctrl+ 0
-# CHECK: bcctrl 7, 3, 0
+# CHECK: bcctrl 7, 3
0x4c 0xe3 0x04 0x21
# FIXME: decode as bnulr- 2
-# CHECK: bclr 6, 11, 0
+# CHECK: bclr 6, 11
0x4c 0xcb 0x00 0x20
# FIXME: decode as bnulr- 0
-# CHECK: bclr 6, 3, 0
+# CHECK: bclr 6, 3
0x4c 0xc3 0x00 0x20
# FIXME: decode as bnuctr- 2
-# CHECK: bcctr 6, 11, 0
+# CHECK: bcctr 6, 11
0x4c 0xcb 0x04 0x20
# FIXME: decode as bnuctr- 0
-# CHECK: bcctr 6, 3, 0
+# CHECK: bcctr 6, 3
0x4c 0xc3 0x04 0x20
# FIXME: decode as bnulrl- 2
-# CHECK: bclrl 6, 11, 0
+# CHECK: bclrl 6, 11
0x4c 0xcb 0x00 0x21
# FIXME: decode as bnulrl- 0
-# CHECK: bclrl 6, 3, 0
+# CHECK: bclrl 6, 3
0x4c 0xc3 0x00 0x21
# FIXME: decode as bnuctrl- 2
-# CHECK: bcctrl 6, 11, 0
+# CHECK: bcctrl 6, 11
0x4c 0xcb 0x04 0x21
# FIXME: decode as bnuctrl- 0
-# CHECK: bcctrl 6, 3, 0
+# CHECK: bcctrl 6, 3
0x4c 0xc3 0x04 0x21
# FIXME: decode as bunlr 2
-# CHECK: bclr 12, 11, 0
+# CHECK: bclr 12, 11
0x4d 0x8b 0x00 0x20
# FIXME: decode as bunlr 0
-# CHECK: bclr 12, 3, 0
+# CHECK: bclr 12, 3
0x4d 0x83 0x00 0x20
# FIXME: decode as bunctr 2
-# CHECK: bcctr 12, 11, 0
+# CHECK: bcctr 12, 11
0x4d 0x8b 0x04 0x20
# FIXME: decode as bunctr 0
-# CHECK: bcctr 12, 3, 0
+# CHECK: bcctr 12, 3
0x4d 0x83 0x04 0x20
# FIXME: decode as bunlrl 2
-# CHECK: bclrl 12, 11, 0
+# CHECK: bclrl 12, 11
0x4d 0x8b 0x00 0x21
# FIXME: decode as bunlrl 0
-# CHECK: bclrl 12, 3, 0
+# CHECK: bclrl 12, 3
0x4d 0x83 0x00 0x21
# FIXME: decode as bunctrl 2
-# CHECK: bcctrl 12, 11, 0
+# CHECK: bcctrl 12, 11
0x4d 0x8b 0x04 0x21
# FIXME: decode as bunctrl 0
-# CHECK: bcctrl 12, 3, 0
+# CHECK: bcctrl 12, 3
0x4d 0x83 0x04 0x21
# FIXME: decode as bunlr+ 2
-# CHECK: bclr 15, 11, 0
+# CHECK: bclr 15, 11
0x4d 0xeb 0x00 0x20
# FIXME: decode as bunlr+ 0
-# CHECK: bclr 15, 3, 0
+# CHECK: bclr 15, 3
0x4d 0xe3 0x00 0x20
# FIXME: decode as bunctr+ 2
-# CHECK: bcctr 15, 11, 0
+# CHECK: bcctr 15, 11
0x4d 0xeb 0x04 0x20
# FIXME: decode as bunctr+ 0
-# CHECK: bcctr 15, 3, 0
+# CHECK: bcctr 15, 3
0x4d 0xe3 0x04 0x20
# FIXME: decode as bunlrl+ 2
-# CHECK: bclrl 15, 11, 0
+# CHECK: bclrl 15, 11
0x4d 0xeb 0x00 0x21
# FIXME: decode as bunlrl+ 0
-# CHECK: bclrl 15, 3, 0
+# CHECK: bclrl 15, 3
0x4d 0xe3 0x00 0x21
# FIXME: decode as bunctrl+ 2
-# CHECK: bcctrl 15, 11, 0
+# CHECK: bcctrl 15, 11
0x4d 0xeb 0x04 0x21
# FIXME: decode as bunctrl+ 0
-# CHECK: bcctrl 15, 3, 0
+# CHECK: bcctrl 15, 3
0x4d 0xe3 0x04 0x21
# FIXME: decode as bunlr- 2
-# CHECK: bclr 14, 11, 0
+# CHECK: bclr 14, 11
0x4d 0xcb 0x00 0x20
# FIXME: decode as bunlr- 0
-# CHECK: bclr 14, 3, 0
+# CHECK: bclr 14, 3
0x4d 0xc3 0x00 0x20
# FIXME: decode as bunctr- 2
-# CHECK: bcctr 14, 11, 0
+# CHECK: bcctr 14, 11
0x4d 0xcb 0x04 0x20
# FIXME: decode as bunctr- 0
-# CHECK: bcctr 14, 3, 0
+# CHECK: bcctr 14, 3
0x4d 0xc3 0x04 0x20
# FIXME: decode as bunlrl- 2
-# CHECK: bclrl 14, 11, 0
+# CHECK: bclrl 14, 11
0x4d 0xcb 0x00 0x21
# FIXME: decode as bunlrl- 0
-# CHECK: bclrl 14, 3, 0
+# CHECK: bclrl 14, 3
0x4d 0xc3 0x00 0x21
# FIXME: decode as bunctrl- 2
-# CHECK: bcctrl 14, 11, 0
+# CHECK: bcctrl 14, 11
0x4d 0xcb 0x04 0x21
# FIXME: decode as bunctrl- 0
-# CHECK: bcctrl 14, 3, 0
+# CHECK: bcctrl 14, 3
0x4d 0xc3 0x04 0x21
# FIXME: decode as bnulr 2
-# CHECK: bclr 4, 11, 0
+# CHECK: bclr 4, 11
0x4c 0x8b 0x00 0x20
# FIXME: decode as bnulr 0
-# CHECK: bclr 4, 3, 0
+# CHECK: bclr 4, 3
0x4c 0x83 0x00 0x20
# FIXME: decode as bnuctr 2
-# CHECK: bcctr 4, 11, 0
+# CHECK: bcctr 4, 11
0x4c 0x8b 0x04 0x20
# FIXME: decode as bnuctr 0
-# CHECK: bcctr 4, 3, 0
+# CHECK: bcctr 4, 3
0x4c 0x83 0x04 0x20
# FIXME: decode as bnulrl 2
-# CHECK: bclrl 4, 11, 0
+# CHECK: bclrl 4, 11
0x4c 0x8b 0x00 0x21
# FIXME: decode as bnulrl 0
-# CHECK: bclrl 4, 3, 0
+# CHECK: bclrl 4, 3
0x4c 0x83 0x00 0x21
# FIXME: decode as bnuctrl 2
-# CHECK: bcctrl 4, 11, 0
+# CHECK: bcctrl 4, 11
0x4c 0x8b 0x04 0x21
# FIXME: decode as bnuctrl 0
-# CHECK: bcctrl 4, 3, 0
+# CHECK: bcctrl 4, 3
0x4c 0x83 0x04 0x21
# FIXME: decode as bnulr+ 2
-# CHECK: bclr 7, 11, 0
+# CHECK: bclr 7, 11
0x4c 0xeb 0x00 0x20
# FIXME: decode as bnulr+ 0
-# CHECK: bclr 7, 3, 0
+# CHECK: bclr 7, 3
0x4c 0xe3 0x00 0x20
# FIXME: decode as bnuctr+ 2
-# CHECK: bcctr 7, 11, 0
+# CHECK: bcctr 7, 11
0x4c 0xeb 0x04 0x20
# FIXME: decode as bnuctr+ 0
-# CHECK: bcctr 7, 3, 0
+# CHECK: bcctr 7, 3
0x4c 0xe3 0x04 0x20
# FIXME: decode as bnulrl+ 2
-# CHECK: bclrl 7, 11, 0
+# CHECK: bclrl 7, 11
0x4c 0xeb 0x00 0x21
# FIXME: decode as bnulrl+ 0
-# CHECK: bclrl 7, 3, 0
+# CHECK: bclrl 7, 3
0x4c 0xe3 0x00 0x21
# FIXME: decode as bnuctrl+ 2
-# CHECK: bcctrl 7, 11, 0
+# CHECK: bcctrl 7, 11
0x4c 0xeb 0x04 0x21
# FIXME: decode as bnuctrl+ 0
-# CHECK: bcctrl 7, 3, 0
+# CHECK: bcctrl 7, 3
0x4c 0xe3 0x04 0x21
# FIXME: decode as bnulr- 2
-# CHECK: bclr 6, 11, 0
+# CHECK: bclr 6, 11
0x4c 0xcb 0x00 0x20
# FIXME: decode as bnulr- 0
-# CHECK: bclr 6, 3, 0
+# CHECK: bclr 6, 3
0x4c 0xc3 0x00 0x20
# FIXME: decode as bnuctr- 2
-# CHECK: bcctr 6, 11, 0
+# CHECK: bcctr 6, 11
0x4c 0xcb 0x04 0x20
# FIXME: decode as bnuctr- 0
-# CHECK: bcctr 6, 3, 0
+# CHECK: bcctr 6, 3
0x4c 0xc3 0x04 0x20
# FIXME: decode as bnulrl- 2
-# CHECK: bclrl 6, 11, 0
+# CHECK: bclrl 6, 11
0x4c 0xcb 0x00 0x21
# FIXME: decode as bnulrl- 0
-# CHECK: bclrl 6, 3, 0
+# CHECK: bclrl 6, 3
0x4c 0xc3 0x00 0x21
# FIXME: decode as bnuctrl- 2
-# CHECK: bcctrl 6, 11, 0
+# CHECK: bcctrl 6, 11
0x4c 0xcb 0x04 0x21
# FIXME: decode as bnuctrl- 0
-# CHECK: bcctrl 6, 3, 0
+# CHECK: bcctrl 6, 3
0x4c 0xc3 0x04 0x21
# FIXME: test bc 12, 2, target
@@ -1801,16 +1801,16 @@
# FIXME: test bnula- 2, target
# FIXME: test bnula- 0, target
-# CHECK: creqv 2, 2, 2
+# CHECK: crset 2
0x4c 0x42 0x12 0x42
-# CHECK: crxor 2, 2, 2
+# CHECK: crclr 2
0x4c 0x42 0x11 0x82
-# CHECK: cror 2, 3, 3
+# CHECK: crmove 2, 3
0x4c 0x43 0x1b 0x82
-# CHECK: crnor 2, 3, 3
+# CHECK: crnot 2, 3
0x4c 0x43 0x18 0x42
# CHECK: addi 2, 3, -128
@@ -1840,61 +1840,61 @@
# CHECK: cmpdi 2, 3, 128
0x2d 0x23 0x00 0x80
-# CHECK: cmpdi 0, 3, 128
+# CHECK: cmpdi 3, 128
0x2c 0x23 0x00 0x80
# CHECK: cmpd 2, 3, 4
0x7d 0x23 0x20 0x00
-# CHECK: cmpd 0, 3, 4
+# CHECK: cmpd 3, 4
0x7c 0x23 0x20 0x00
# CHECK: cmpldi 2, 3, 128
0x29 0x23 0x00 0x80
-# CHECK: cmpldi 0, 3, 128
+# CHECK: cmpldi 3, 128
0x28 0x23 0x00 0x80
# CHECK: cmpld 2, 3, 4
0x7d 0x23 0x20 0x40
-# CHECK: cmpld 0, 3, 4
+# CHECK: cmpld 3, 4
0x7c 0x23 0x20 0x40
# CHECK: cmpwi 2, 3, 128
0x2d 0x03 0x00 0x80
-# CHECK: cmpwi 0, 3, 128
+# CHECK: cmpwi 3, 128
0x2c 0x03 0x00 0x80
# CHECK: cmpw 2, 3, 4
0x7d 0x03 0x20 0x00
-# CHECK: cmpw 0, 3, 4
+# CHECK: cmpw 3, 4
0x7c 0x03 0x20 0x00
# CHECK: cmplwi 2, 3, 128
0x29 0x03 0x00 0x80
-# CHECK: cmplwi 0, 3, 128
+# CHECK: cmplwi 3, 128
0x28 0x03 0x00 0x80
# CHECK: cmplw 2, 3, 4
0x7d 0x03 0x20 0x40
-# CHECK: cmplw 0, 3, 4
+# CHECK: cmplw 3, 4
0x7c 0x03 0x20 0x40
-# CHECK: twi 16, 3, 4
+# CHECK: twlti 3, 4
0x0e 0x03 0x00 0x04
-# CHECK: tw 16, 3, 4
+# CHECK: twlt 3, 4
0x7e 0x03 0x20 0x08
-# CHECK: tdi 16, 3, 4
+# CHECK: tdlti 3, 4
0x0a 0x03 0x00 0x04
-# CHECK: td 16, 3, 4
+# CHECK: tdlt 3, 4
0x7e 0x03 0x20 0x88
# CHECK: twi 20, 3, 4
@@ -1909,16 +1909,16 @@
# CHECK: td 20, 3, 4
0x7e 0x83 0x20 0x88
-# CHECK: twi 4, 3, 4
+# CHECK: tweqi 3, 4
0x0c 0x83 0x00 0x04
-# CHECK: tw 4, 3, 4
+# CHECK: tweq 3, 4
0x7c 0x83 0x20 0x08
-# CHECK: tdi 4, 3, 4
+# CHECK: tdeqi 3, 4
0x08 0x83 0x00 0x04
-# CHECK: td 4, 3, 4
+# CHECK: tdeq 3, 4
0x7c 0x83 0x20 0x88
# CHECK: twi 12, 3, 4
@@ -1933,16 +1933,16 @@
# CHECK: td 12, 3, 4
0x7d 0x83 0x20 0x88
-# CHECK: twi 8, 3, 4
+# CHECK: twgti 3, 4
0x0d 0x03 0x00 0x04
-# CHECK: tw 8, 3, 4
+# CHECK: twgt 3, 4
0x7d 0x03 0x20 0x08
-# CHECK: tdi 8, 3, 4
+# CHECK: tdgti 3, 4
0x09 0x03 0x00 0x04
-# CHECK: td 8, 3, 4
+# CHECK: tdgt 3, 4
0x7d 0x03 0x20 0x88
# CHECK: twi 12, 3, 4
@@ -1957,16 +1957,16 @@
# CHECK: td 12, 3, 4
0x7d 0x83 0x20 0x88
-# CHECK: twi 24, 3, 4
+# CHECK: twnei 3, 4
0x0f 0x03 0x00 0x04
-# CHECK: tw 24, 3, 4
+# CHECK: twne 3, 4
0x7f 0x03 0x20 0x08
-# CHECK: tdi 24, 3, 4
+# CHECK: tdnei 3, 4
0x0b 0x03 0x00 0x04
-# CHECK: td 24, 3, 4
+# CHECK: tdne 3, 4
0x7f 0x03 0x20 0x88
# CHECK: twi 20, 3, 4
@@ -1981,16 +1981,16 @@
# CHECK: td 20, 3, 4
0x7e 0x83 0x20 0x88
-# CHECK: twi 2, 3, 4
+# CHECK: twllti 3, 4
0x0c 0x43 0x00 0x04
-# CHECK: tw 2, 3, 4
+# CHECK: twllt 3, 4
0x7c 0x43 0x20 0x08
-# CHECK: tdi 2, 3, 4
+# CHECK: tdllti 3, 4
0x08 0x43 0x00 0x04
-# CHECK: td 2, 3, 4
+# CHECK: tdllt 3, 4
0x7c 0x43 0x20 0x88
# CHECK: twi 6, 3, 4
@@ -2017,16 +2017,16 @@
# CHECK: td 5, 3, 4
0x7c 0xa3 0x20 0x88
-# CHECK: twi 1, 3, 4
+# CHECK: twlgti 3, 4
0x0c 0x23 0x00 0x04
-# CHECK: tw 1, 3, 4
+# CHECK: twlgt 3, 4
0x7c 0x23 0x20 0x08
-# CHECK: tdi 1, 3, 4
+# CHECK: tdlgti 3, 4
0x08 0x23 0x00 0x04
-# CHECK: td 1, 3, 4
+# CHECK: tdlgt 3, 4
0x7c 0x23 0x20 0x88
# CHECK: twi 5, 3, 4
@@ -2053,16 +2053,16 @@
# CHECK: td 6, 3, 4
0x7c 0xc3 0x20 0x88
-# CHECK: twi 31, 3, 4
+# CHECK: twui 3, 4
0x0f 0xe3 0x00 0x04
-# CHECK: tw 31, 3, 4
+# CHECK: twu 3, 4
0x7f 0xe3 0x20 0x08
-# CHECK: tdi 31, 3, 4
+# CHECK: tdui 3, 4
0x0b 0xe3 0x00 0x04
-# CHECK: td 31, 3, 4
+# CHECK: tdu 3, 4
0x7f 0xe3 0x20 0x88
# CHECK: trap
@@ -2086,22 +2086,22 @@
# CHECK: rldimi. 2, 3, 55, 5
0x78 0x62 0xb9 0x4f
-# CHECK: rldicl 2, 3, 4, 0
+# CHECK: rotldi 2, 3, 4
0x78 0x62 0x20 0x00
-# CHECK: rldicl. 2, 3, 4, 0
+# CHECK: rotldi. 2, 3, 4
0x78 0x62 0x20 0x01
-# CHECK: rldicl 2, 3, 60, 0
+# CHECK: rotldi 2, 3, 60
0x78 0x62 0xe0 0x02
-# CHECK: rldicl. 2, 3, 60, 0
+# CHECK: rotldi. 2, 3, 60
0x78 0x62 0xe0 0x03
-# CHECK: rldcl 2, 3, 4, 0
+# CHECK: rotld 2, 3, 4
0x78 0x62 0x20 0x10
-# CHECK: rldcl. 2, 3, 4, 0
+# CHECK: rotld. 2, 3, 4
0x78 0x62 0x20 0x11
# CHECK: sldi 2, 3, 4
@@ -2116,10 +2116,10 @@
# CHECK: rldicl. 2, 3, 60, 4
0x78 0x62 0xe1 0x03
-# CHECK: rldicl 2, 3, 0, 4
+# CHECK: clrldi 2, 3, 4
0x78 0x62 0x01 0x00
-# CHECK: rldicl. 2, 3, 0, 4
+# CHECK: clrldi. 2, 3, 4
0x78 0x62 0x01 0x01
# CHECK: rldicr 2, 3, 0, 59
@@ -2158,22 +2158,22 @@
# CHECK: rlwimi. 2, 3, 23, 5, 8
0x50 0x62 0xb9 0x51
-# CHECK: rlwinm 2, 3, 4, 0, 31
+# CHECK: rotlwi 2, 3, 4
0x54 0x62 0x20 0x3e
-# CHECK: rlwinm. 2, 3, 4, 0, 31
+# CHECK: rotlwi. 2, 3, 4
0x54 0x62 0x20 0x3f
-# CHECK: rlwinm 2, 3, 28, 0, 31
+# CHECK: rotlwi 2, 3, 28
0x54 0x62 0xe0 0x3e
-# CHECK: rlwinm. 2, 3, 28, 0, 31
+# CHECK: rotlwi. 2, 3, 28
0x54 0x62 0xe0 0x3f
-# CHECK: rlwnm 2, 3, 4, 0, 31
+# CHECK: rotlw 2, 3, 4
0x5c 0x62 0x20 0x3e
-# CHECK: rlwnm. 2, 3, 4, 0, 31
+# CHECK: rotlw. 2, 3, 4
0x5c 0x62 0x20 0x3f
# CHECK: slwi 2, 3, 4
@@ -2188,10 +2188,10 @@
# CHECK: rlwinm. 2, 3, 28, 4, 31
0x54 0x62 0xe1 0x3f
-# CHECK: rlwinm 2, 3, 0, 4, 31
+# CHECK: clrlwi 2, 3, 4
0x54 0x62 0x01 0x3e
-# CHECK: rlwinm. 2, 3, 0, 4, 31
+# CHECK: clrlwi. 2, 3, 4
0x54 0x62 0x01 0x3f
# CHECK: rlwinm 2, 3, 0, 0, 27
@@ -2206,10 +2206,10 @@
# CHECK: rlwinm. 2, 3, 4, 1, 27
0x54 0x62 0x20 0x77
-# CHECK: mtspr 1, 2
+# CHECK: mtxer 2
0x7c 0x41 0x03 0xa6
-# CHECK: mfspr 2, 1
+# CHECK: mfxer 2
0x7c 0x41 0x02 0xa6
# CHECK: mtlr 2
@@ -2227,7 +2227,7 @@
# CHECK: nop
0x60 0x00 0x00 0x00
-# CHECK: xori 0, 0, 0
+# CHECK: xnop
0x68 0x00 0x00 0x00
# CHECK: li 2, 128
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt Thu Apr 23 13:30:38 2015
@@ -19,25 +19,25 @@
# CHECK: bclr 4, 10, 3
0x4c 0x8a 0x18 0x20
-# CHECK: bclr 4, 10, 0
+# CHECK: bclr 4, 10
0x4c 0x8a 0x00 0x20
# CHECK: bclrl 4, 10, 3
0x4c 0x8a 0x18 0x21
-# CHECK: bclrl 4, 10, 0
+# CHECK: bclrl 4, 10
0x4c 0x8a 0x00 0x21
# CHECK: bcctr 4, 10, 3
0x4c 0x8a 0x1c 0x20
-# CHECK: bcctr 4, 10, 0
+# CHECK: bcctr 4, 10
0x4c 0x8a 0x04 0x20
# CHECK: bcctrl 4, 10, 3
0x4c 0x8a 0x1c 0x21
-# CHECK: bcctrl 4, 10, 0
+# CHECK: bcctrl 4, 10
0x4c 0x8a 0x04 0x21
# CHECK: crand 2, 3, 4
@@ -70,7 +70,7 @@
# CHECK: sc 1
0x44 0x00 0x00 0x22
-# CHECK: sc 0
+# CHECK: sc
0x44 0x00 0x00 0x02
# CHECK: lbz 2, 128(4)
@@ -406,16 +406,16 @@
# CHECK: cmplw 2, 3, 4
0x7d 0x03 0x20 0x40
-# CHECK: twi 2, 3, 4
+# CHECK: twllti 3, 4
0x0c 0x43 0x00 0x04
-# CHECK: tw 2, 3, 4
+# CHECK: twllt 3, 4
0x7c 0x43 0x20 0x08
-# CHECK: tdi 2, 3, 4
+# CHECK: tdllti 3, 4
0x08 0x43 0x00 0x04
-# CHECK: td 2, 3, 4
+# CHECK: tdllt 3, 4
0x7c 0x43 0x20 0x88
# CHECK: isel 2, 3, 4, 5
@@ -499,10 +499,10 @@
# CHECK: extsh. 2, 3
0x7c 0x62 0x07 0x35
-# CHECK: cntlzw 2, 3
+# CHECK: cntlz 2, 3
0x7c 0x62 0x00 0x34
-# CHECK: cntlzw. 2, 3
+# CHECK: cntlz. 2, 3
0x7c 0x62 0x00 0x35
# CHECK: popcntw 2, 3
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-operands.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-operands.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-operands.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-operands.txt Thu Apr 23 13:30:38 2015
@@ -85,10 +85,10 @@
0x48 0x00 0x04 0x02
# FIXME: decode as beq 0, .+1024
-# CHECK: bc 12, 2, .+1024
+# CHECK: bt 2, .+1024
0x41 0x82 0x04 0x00
# FIXME: decode as beqa 0, 1024
-# CHECK: bca 12, 2, 1024
+# CHECK: bta 2, 1024
0x41 0x82 0x04 0x02
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/qpx.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/qpx.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/qpx.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/qpx.txt Thu Apr 23 13:30:38 2015
@@ -9,12 +9,10 @@
# CHECK: qvfadds 3, 4, 5
0x00 0x64 0x28 0x2a
-# FIXME: decode as qvfandc 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 4
+# CHECK: qvfandc 3, 4, 5
0x10 0x64 0x2a 0x08
-# FIXME: decode as qvfand 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 1
+# CHECK: qvfand 3, 4, 5
0x10 0x64 0x28 0x88
# CHECK: qvfcfid 3, 5
@@ -29,15 +27,13 @@
# CHECK: qvfcfidus 3, 5
0x00 0x60 0x2f 0x9c
-# FIXME: decode as qvfclr 3
-# CHECK: qvflogical 3, 3, 3, 0
+# CHECK: qvfclr 3
0x10 0x63 0x18 0x08
# CHECK: qvfcpsgn 3, 4, 5
0x10 0x64 0x28 0x10
-# FIXME: decode as qvfctfb 3, 4
-# CHECK: qvflogical 3, 4, 4, 5
+# CHECK: qvfctfb 3, 4
0x10 0x64 0x22 0x88
# CHECK: qvfctid 3, 5
@@ -64,8 +60,7 @@
# CHECK: qvfctiwz 3, 5
0x10 0x60 0x28 0x1e
-# FIXME: decode as qvfequ 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 9
+# CHECK: qvfequ 3, 4, 5
0x10 0x64 0x2c 0x88
# CHECK: qvflogical 3, 4, 5, 12
@@ -95,8 +90,7 @@
# CHECK: qvfnabs 3, 5
0x10 0x60 0x29 0x10
-# FIXME: decode as qvfnand 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 14
+# CHECK: qvfnand 3, 4, 5
0x10 0x64 0x2f 0x08
# CHECK: qvfneg 3, 5
@@ -114,20 +108,16 @@
# CHECK: qvfnmsubs 3, 4, 6, 5
0x00 0x64 0x29 0xbc
-# FIXME: decode as qvfnor 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 8
+# CHECK: qvfnor 3, 4, 5
0x10 0x64 0x2c 0x08
-# FIXME: decode as qvfnot 3, 4
-# CHECK: qvflogical 3, 4, 4, 10
+# CHECK: qvfnot 3, 4
0x10 0x64 0x25 0x08
-# FIXME: decode as qvforc 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 13
+# CHECK: qvforc 3, 4, 5
0x10 0x64 0x2e 0x88
-# FIXME: decode as qvfor 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 7
+# CHECK: qvfor 3, 4, 5
0x10 0x64 0x2b 0x88
# CHECK: qvfperm 3, 4, 5, 6
@@ -163,8 +153,7 @@
# CHECK: qvfsel 3, 4, 6, 5
0x10 0x64 0x29 0xae
-# FIXME: decode as qvfset 3
-# CHECK: qvflogical 3, 3, 3, 15
+# CHECK: qvfset 3
0x10 0x63 0x1f 0x88
# CHECK: qvfsub 3, 4, 5
@@ -185,8 +174,7 @@
# CHECK: qvfxmuls 3, 4, 6
0x00 0x64 0x01 0xa2
-# FIXME: decode as qvfxor 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 6
+# CHECK: qvfxor 3, 4, 5
0x10 0x64 0x2b 0x08
# CHECK: qvfxxcpnmadd 3, 4, 6, 5
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt Thu Apr 23 13:30:38 2015
@@ -273,12 +273,10 @@
# CHECK: xvminsp 7, 63, 27
0xf0 0xff 0xde 0x44
-# FIXME: decode as xvmovdp 7, 63
-# CHECK: xvcpsgndp 7, 63, 63
+# CHECK: xvmovdp 7, 63
0xf0 0xff 0xff 0x86
-# FIXME: decode as xvmovsp 7, 63
-# CHECK: xvcpsgnsp 7, 63, 63
+# CHECK: xvmovsp 7, 63
0xf0 0xff 0xfe 0x86
# CHECK: xvmsubadp 7, 63, 27
@@ -425,15 +423,13 @@
# CHECK: xxlxor 7, 63, 27
0xf0 0xff 0xdc 0xd4
-# FIXME: decode as xxmrghd 7, 63, 27
-# CHECK: xxpermdi 7, 63, 27, 0
+# CHECK: xxmrghd 7, 63, 27
0xf0 0xff 0xd8 0x54
# CHECK: xxmrghw 7, 63, 27
0xf0 0xff 0xd8 0x94
-# FIXME: decode as xxmrgld 7, 63, 27
-# CHECK: xxpermdi 7, 63, 27, 3
+# CHECK: xxmrgld 7, 63, 27
0xf0 0xff 0xdb 0x54
# CHECK: xxmrglw 7, 63, 27
@@ -448,15 +444,13 @@
# CHECK: xxsldwi 7, 63, 27, 1
0xf0 0xff 0xd9 0x14
-# FIXME: decode as xxspltd 7, 63, 1
-# CHECK: xxpermdi 7, 63, 63, 3
+# CHECK: xxspltd 7, 63, 1
0xf0 0xff 0xfb 0x56
# CHECK: xxspltw 7, 27, 3
0xf0 0xe3 0xda 0x90
-# FIXME: decode as xxswapd 7, 63
-# CHECK: xxpermdi 7, 63, 63, 2
+# CHECK: xxswapd 7, 63
0xf0 0xff 0xfa 0x56
# CHECK: mfvsrd 3, 0
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s Thu Apr 23 13:30:38 2015
@@ -10,30 +10,30 @@
# CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c]
mtdcr 178,3
-# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64]
-# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c]
+# CHECK-BE: tlbrehi 2, 3 # encoding: [0x7c,0x43,0x07,0x64]
+# CHECK-LE: tlbrehi 2, 3 # encoding: [0x64,0x07,0x43,0x7c]
tlbre %r2, %r3, 0
-# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64]
-# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c]
+# CHECK-BE: tlbrelo 2, 3 # encoding: [0x7c,0x43,0x0f,0x64]
+# CHECK-LE: tlbrelo 2, 3 # encoding: [0x64,0x0f,0x43,0x7c]
tlbre %r2, %r3, 1
-# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64]
-# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c]
+# CHECK-BE: tlbrehi 2, 3 # encoding: [0x7c,0x43,0x07,0x64]
+# CHECK-LE: tlbrehi 2, 3 # encoding: [0x64,0x07,0x43,0x7c]
tlbrehi %r2, %r3
-# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64]
-# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c]
+# CHECK-BE: tlbrelo 2, 3 # encoding: [0x7c,0x43,0x0f,0x64]
+# CHECK-LE: tlbrelo 2, 3 # encoding: [0x64,0x0f,0x43,0x7c]
tlbrelo %r2, %r3
-# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4]
-# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c]
+# CHECK-BE: tlbwehi 2, 3 # encoding: [0x7c,0x43,0x07,0xa4]
+# CHECK-LE: tlbwehi 2, 3 # encoding: [0xa4,0x07,0x43,0x7c]
tlbwe %r2, %r3, 0
-# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4]
-# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c]
+# CHECK-BE: tlbwelo 2, 3 # encoding: [0x7c,0x43,0x0f,0xa4]
+# CHECK-LE: tlbwelo 2, 3 # encoding: [0xa4,0x0f,0x43,0x7c]
tlbwe %r2, %r3, 1
-# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4]
-# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c]
+# CHECK-BE: tlbwehi 2, 3 # encoding: [0x7c,0x43,0x07,0xa4]
+# CHECK-LE: tlbwehi 2, 3 # encoding: [0xa4,0x07,0x43,0x7c]
tlbwehi %r2, %r3
-# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4]
-# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c]
+# CHECK-BE: tlbwelo 2, 3 # encoding: [0x7c,0x43,0x0f,0xa4]
+# CHECK-LE: tlbwelo 2, 3 # encoding: [0xa4,0x0f,0x43,0x7c]
tlbwelo %r2, %r3
# CHECK-BE: tlbsx 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x24]
@@ -43,52 +43,52 @@
# CHECK-LE: tlbsx. 2, 3, 1 # encoding: [0x25,0x0f,0x43,0x7c]
tlbsx. %r2, %r3, %r1
-# CHECK-BE: mfspr 2, 1018 # encoding: [0x7c,0x5a,0xfa,0xa6]
-# CHECK-LE: mfspr 2, 1018 # encoding: [0xa6,0xfa,0x5a,0x7c]
+# CHECK-BE: mfdccr 2 # encoding: [0x7c,0x5a,0xfa,0xa6]
+# CHECK-LE: mfdccr 2 # encoding: [0xa6,0xfa,0x5a,0x7c]
mfdccr %r2
-# CHECK-BE: mtspr 1018, 2 # encoding: [0x7c,0x5a,0xfb,0xa6]
-# CHECK-LE: mtspr 1018, 2 # encoding: [0xa6,0xfb,0x5a,0x7c]
+# CHECK-BE: mtdccr 2 # encoding: [0x7c,0x5a,0xfb,0xa6]
+# CHECK-LE: mtdccr 2 # encoding: [0xa6,0xfb,0x5a,0x7c]
mtdccr %r2
-# CHECK-BE: mfspr 2, 1019 # encoding: [0x7c,0x5b,0xfa,0xa6]
-# CHECK-LE: mfspr 2, 1019 # encoding: [0xa6,0xfa,0x5b,0x7c]
+# CHECK-BE: mficcr 2 # encoding: [0x7c,0x5b,0xfa,0xa6]
+# CHECK-LE: mficcr 2 # encoding: [0xa6,0xfa,0x5b,0x7c]
mficcr %r2
-# CHECK-BE: mtspr 1019, 2 # encoding: [0x7c,0x5b,0xfb,0xa6]
-# CHECK-LE: mtspr 1019, 2 # encoding: [0xa6,0xfb,0x5b,0x7c]
+# CHECK-BE: mticcr 2 # encoding: [0x7c,0x5b,0xfb,0xa6]
+# CHECK-LE: mticcr 2 # encoding: [0xa6,0xfb,0x5b,0x7c]
mticcr %r2
-# CHECK-BE: mfspr 2, 981 # encoding: [0x7c,0x55,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 981 # encoding: [0xa6,0xf2,0x55,0x7c]
+# CHECK-BE: mfdear 2 # encoding: [0x7c,0x55,0xf2,0xa6]
+# CHECK-LE: mfdear 2 # encoding: [0xa6,0xf2,0x55,0x7c]
mfdear %r2
-# CHECK-BE: mtspr 981, 2 # encoding: [0x7c,0x55,0xf3,0xa6]
-# CHECK-LE: mtspr 981, 2 # encoding: [0xa6,0xf3,0x55,0x7c]
+# CHECK-BE: mtdear 2 # encoding: [0x7c,0x55,0xf3,0xa6]
+# CHECK-LE: mtdear 2 # encoding: [0xa6,0xf3,0x55,0x7c]
mtdear %r2
-# CHECK-BE: mfspr 2, 980 # encoding: [0x7c,0x54,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 980 # encoding: [0xa6,0xf2,0x54,0x7c]
+# CHECK-BE: mfesr 2 # encoding: [0x7c,0x54,0xf2,0xa6]
+# CHECK-LE: mfesr 2 # encoding: [0xa6,0xf2,0x54,0x7c]
mfesr %r2
-# CHECK-BE: mtspr 980, 2 # encoding: [0x7c,0x54,0xf3,0xa6]
-# CHECK-LE: mtspr 980, 2 # encoding: [0xa6,0xf3,0x54,0x7c]
+# CHECK-BE: mtesr 2 # encoding: [0x7c,0x54,0xf3,0xa6]
+# CHECK-LE: mtesr 2 # encoding: [0xa6,0xf3,0x54,0x7c]
mtesr %r2
-# CHECK-BE: mfspr 2, 986 # encoding: [0x7c,0x5a,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 986 # encoding: [0xa6,0xf2,0x5a,0x7c]
+# CHECK-BE: mftcr 2 # encoding: [0x7c,0x5a,0xf2,0xa6]
+# CHECK-LE: mftcr 2 # encoding: [0xa6,0xf2,0x5a,0x7c]
mftcr %r2
-# CHECK-BE: mtspr 986, 2 # encoding: [0x7c,0x5a,0xf3,0xa6]
-# CHECK-LE: mtspr 986, 2 # encoding: [0xa6,0xf3,0x5a,0x7c]
+# CHECK-BE: mttcr 2 # encoding: [0x7c,0x5a,0xf3,0xa6]
+# CHECK-LE: mttcr 2 # encoding: [0xa6,0xf3,0x5a,0x7c]
mttcr %r2
-# CHECK-BE: mfspr 2, 989 # encoding: [0x7c,0x5d,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 989 # encoding: [0xa6,0xf2,0x5d,0x7c]
+# CHECK-BE: mftblo 2 # encoding: [0x7c,0x5d,0xf2,0xa6]
+# CHECK-LE: mftblo 2 # encoding: [0xa6,0xf2,0x5d,0x7c]
mftblo %r2
-# CHECK-BE: mtspr 989, 2 # encoding: [0x7c,0x5d,0xf3,0xa6]
-# CHECK-LE: mtspr 989, 2 # encoding: [0xa6,0xf3,0x5d,0x7c]
+# CHECK-BE: mttblo 2 # encoding: [0x7c,0x5d,0xf3,0xa6]
+# CHECK-LE: mttblo 2 # encoding: [0xa6,0xf3,0x5d,0x7c]
mttblo %r2
-# CHECK-BE: mfspr 2, 988 # encoding: [0x7c,0x5c,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 988 # encoding: [0xa6,0xf2,0x5c,0x7c]
+# CHECK-BE: mftbhi 2 # encoding: [0x7c,0x5c,0xf2,0xa6]
+# CHECK-LE: mftbhi 2 # encoding: [0xa6,0xf2,0x5c,0x7c]
mftbhi %r2
-# CHECK-BE: mtspr 988, 2 # encoding: [0x7c,0x5c,0xf3,0xa6]
-# CHECK-LE: mtspr 988, 2 # encoding: [0xa6,0xf3,0x5c,0x7c]
+# CHECK-BE: mttbhi 2 # encoding: [0x7c,0x5c,0xf3,0xa6]
+# CHECK-LE: mttbhi 2 # encoding: [0xa6,0xf3,0x5c,0x7c]
mttbhi %r2
# CHECK-BE: dccci 5, 6 # encoding: [0x7c,0x05,0x33,0x8c]
@@ -104,64 +104,64 @@
# CHECK-LE: iccci 0, 0 # encoding: [0x8c,0x07,0x00,0x7c]
ici 0
-# CHECK-BE: mfspr 2, 990 # encoding: [0x7c,0x5e,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 990 # encoding: [0xa6,0xf2,0x5e,0x7c]
+# CHECK-BE: mfsrr2 2 # encoding: [0x7c,0x5e,0xf2,0xa6]
+# CHECK-LE: mfsrr2 2 # encoding: [0xa6,0xf2,0x5e,0x7c]
mfsrr2 2
-# CHECK-BE: mtspr 990, 2 # encoding: [0x7c,0x5e,0xf3,0xa6]
-# CHECK-LE: mtspr 990, 2 # encoding: [0xa6,0xf3,0x5e,0x7c]
+# CHECK-BE: mtsrr2 2 # encoding: [0x7c,0x5e,0xf3,0xa6]
+# CHECK-LE: mtsrr2 2 # encoding: [0xa6,0xf3,0x5e,0x7c]
mtsrr2 2
-# CHECK-BE: mfspr 2, 991 # encoding: [0x7c,0x5f,0xf2,0xa6]
-# CHECK-LE: mfspr 2, 991 # encoding: [0xa6,0xf2,0x5f,0x7c]
+# CHECK-BE: mfsrr3 2 # encoding: [0x7c,0x5f,0xf2,0xa6]
+# CHECK-LE: mfsrr3 2 # encoding: [0xa6,0xf2,0x5f,0x7c]
mfsrr3 2
-# CHECK-BE: mtspr 991, 2 # encoding: [0x7c,0x5f,0xf3,0xa6]
-# CHECK-LE: mtspr 991, 2 # encoding: [0xa6,0xf3,0x5f,0x7c]
+# CHECK-BE: mtsrr3 2 # encoding: [0x7c,0x5f,0xf3,0xa6]
+# CHECK-LE: mtsrr3 2 # encoding: [0xa6,0xf3,0x5f,0x7c]
mtsrr3 2
-# CHECK-BE: mfdcr 5, 128 # encoding: [0x7c,0xa0,0x22,0x86]
-# CHECK-LE: mfdcr 5, 128 # encoding: [0x86,0x22,0xa0,0x7c]
+# CHECK-BE: mfbr0 5 # encoding: [0x7c,0xa0,0x22,0x86]
+# CHECK-LE: mfbr0 5 # encoding: [0x86,0x22,0xa0,0x7c]
mfbr0 %r5
-# CHECK-BE: mtdcr 128, 5 # encoding: [0x7c,0xa0,0x23,0x86]
-# CHECK-LE: mtdcr 128, 5 # encoding: [0x86,0x23,0xa0,0x7c]
+# CHECK-BE: mtbr0 5 # encoding: [0x7c,0xa0,0x23,0x86]
+# CHECK-LE: mtbr0 5 # encoding: [0x86,0x23,0xa0,0x7c]
mtbr0 %r5
-# CHECK-BE: mfdcr 5, 129 # encoding: [0x7c,0xa1,0x22,0x86]
-# CHECK-LE: mfdcr 5, 129 # encoding: [0x86,0x22,0xa1,0x7c]
+# CHECK-BE: mfbr1 5 # encoding: [0x7c,0xa1,0x22,0x86]
+# CHECK-LE: mfbr1 5 # encoding: [0x86,0x22,0xa1,0x7c]
mfbr1 %r5
-# CHECK-BE: mtdcr 129, 5 # encoding: [0x7c,0xa1,0x23,0x86]
-# CHECK-LE: mtdcr 129, 5 # encoding: [0x86,0x23,0xa1,0x7c]
+# CHECK-BE: mtbr1 5 # encoding: [0x7c,0xa1,0x23,0x86]
+# CHECK-LE: mtbr1 5 # encoding: [0x86,0x23,0xa1,0x7c]
mtbr1 %r5
-# CHECK-BE: mfdcr 5, 130 # encoding: [0x7c,0xa2,0x22,0x86]
-# CHECK-LE: mfdcr 5, 130 # encoding: [0x86,0x22,0xa2,0x7c]
+# CHECK-BE: mfbr2 5 # encoding: [0x7c,0xa2,0x22,0x86]
+# CHECK-LE: mfbr2 5 # encoding: [0x86,0x22,0xa2,0x7c]
mfbr2 %r5
-# CHECK-BE: mtdcr 130, 5 # encoding: [0x7c,0xa2,0x23,0x86]
-# CHECK-LE: mtdcr 130, 5 # encoding: [0x86,0x23,0xa2,0x7c]
+# CHECK-BE: mtbr2 5 # encoding: [0x7c,0xa2,0x23,0x86]
+# CHECK-LE: mtbr2 5 # encoding: [0x86,0x23,0xa2,0x7c]
mtbr2 %r5
-# CHECK-BE: mfdcr 5, 131 # encoding: [0x7c,0xa3,0x22,0x86]
-# CHECK-LE: mfdcr 5, 131 # encoding: [0x86,0x22,0xa3,0x7c]
+# CHECK-BE: mfbr3 5 # encoding: [0x7c,0xa3,0x22,0x86]
+# CHECK-LE: mfbr3 5 # encoding: [0x86,0x22,0xa3,0x7c]
mfbr3 %r5
-# CHECK-BE: mtdcr 131, 5 # encoding: [0x7c,0xa3,0x23,0x86]
-# CHECK-LE: mtdcr 131, 5 # encoding: [0x86,0x23,0xa3,0x7c]
+# CHECK-BE: mtbr3 5 # encoding: [0x7c,0xa3,0x23,0x86]
+# CHECK-LE: mtbr3 5 # encoding: [0x86,0x23,0xa3,0x7c]
mtbr3 %r5
-# CHECK-BE: mfdcr 5, 132 # encoding: [0x7c,0xa4,0x22,0x86]
-# CHECK-LE: mfdcr 5, 132 # encoding: [0x86,0x22,0xa4,0x7c]
+# CHECK-BE: mfbr4 5 # encoding: [0x7c,0xa4,0x22,0x86]
+# CHECK-LE: mfbr4 5 # encoding: [0x86,0x22,0xa4,0x7c]
mfbr4 %r5
-# CHECK-BE: mtdcr 132, 5 # encoding: [0x7c,0xa4,0x23,0x86]
-# CHECK-LE: mtdcr 132, 5 # encoding: [0x86,0x23,0xa4,0x7c]
+# CHECK-BE: mtbr4 5 # encoding: [0x7c,0xa4,0x23,0x86]
+# CHECK-LE: mtbr4 5 # encoding: [0x86,0x23,0xa4,0x7c]
mtbr4 %r5
-# CHECK-BE: mfdcr 5, 133 # encoding: [0x7c,0xa5,0x22,0x86]
-# CHECK-LE: mfdcr 5, 133 # encoding: [0x86,0x22,0xa5,0x7c]
+# CHECK-BE: mfbr5 5 # encoding: [0x7c,0xa5,0x22,0x86]
+# CHECK-LE: mfbr5 5 # encoding: [0x86,0x22,0xa5,0x7c]
mfbr5 %r5
-# CHECK-BE: mtdcr 133, 5 # encoding: [0x7c,0xa5,0x23,0x86]
-# CHECK-LE: mtdcr 133, 5 # encoding: [0x86,0x23,0xa5,0x7c]
+# CHECK-BE: mtbr5 5 # encoding: [0x7c,0xa5,0x23,0x86]
+# CHECK-LE: mtbr5 5 # encoding: [0x86,0x23,0xa5,0x7c]
mtbr5 %r5
-# CHECK-BE: mfdcr 5, 134 # encoding: [0x7c,0xa6,0x22,0x86]
-# CHECK-LE: mfdcr 5, 134 # encoding: [0x86,0x22,0xa6,0x7c]
+# CHECK-BE: mfbr6 5 # encoding: [0x7c,0xa6,0x22,0x86]
+# CHECK-LE: mfbr6 5 # encoding: [0x86,0x22,0xa6,0x7c]
mfbr6 %r5
-# CHECK-BE: mtdcr 134, 5 # encoding: [0x7c,0xa6,0x23,0x86]
-# CHECK-LE: mtdcr 134, 5 # encoding: [0x86,0x23,0xa6,0x7c]
+# CHECK-BE: mtbr6 5 # encoding: [0x7c,0xa6,0x23,0x86]
+# CHECK-LE: mtbr6 5 # encoding: [0x86,0x23,0xa6,0x7c]
mtbr6 %r5
-# CHECK-BE: mfdcr 5, 135 # encoding: [0x7c,0xa7,0x22,0x86]
-# CHECK-LE: mfdcr 5, 135 # encoding: [0x86,0x22,0xa7,0x7c]
+# CHECK-BE: mfbr7 5 # encoding: [0x7c,0xa7,0x22,0x86]
+# CHECK-LE: mfbr7 5 # encoding: [0x86,0x22,0xa7,0x7c]
mfbr7 %r5
-# CHECK-BE: mtdcr 135, 5 # encoding: [0x7c,0xa7,0x23,0x86]
-# CHECK-LE: mtdcr 135, 5 # encoding: [0x86,0x23,0xa7,0x7c]
+# CHECK-BE: mtbr7 5 # encoding: [0x7c,0xa7,0x23,0x86]
+# CHECK-LE: mtbr7 5 # encoding: [0x86,0x23,0xa7,0x7c]
mtbr7 %r5
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-6xx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-6xx.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-6xx.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-6xx.s Thu Apr 23 13:30:38 2015
@@ -3,102 +3,102 @@
# Instructions specific to the PowerPC 6xx family:
-# CHECK-BE: mfspr 12, 528 # encoding: [0x7d,0x90,0x82,0xa6]
-# CHECK-LE: mfspr 12, 528 # encoding: [0xa6,0x82,0x90,0x7d]
+# CHECK-BE: mfibatu 12, 0 # encoding: [0x7d,0x90,0x82,0xa6]
+# CHECK-LE: mfibatu 12, 0 # encoding: [0xa6,0x82,0x90,0x7d]
mfibatu %r12, 0
-# CHECK-BE: mfspr 12, 529 # encoding: [0x7d,0x91,0x82,0xa6]
-# CHECK-LE: mfspr 12, 529 # encoding: [0xa6,0x82,0x91,0x7d]
+# CHECK-BE: mfibatl 12, 0 # encoding: [0x7d,0x91,0x82,0xa6]
+# CHECK-LE: mfibatl 12, 0 # encoding: [0xa6,0x82,0x91,0x7d]
mfibatl %r12, 0
-# CHECK-BE: mfspr 12, 530 # encoding: [0x7d,0x92,0x82,0xa6]
-# CHECK-LE: mfspr 12, 530 # encoding: [0xa6,0x82,0x92,0x7d]
+# CHECK-BE: mfibatu 12, 1 # encoding: [0x7d,0x92,0x82,0xa6]
+# CHECK-LE: mfibatu 12, 1 # encoding: [0xa6,0x82,0x92,0x7d]
mfibatu %r12, 1
-# CHECK-BE: mfspr 12, 531 # encoding: [0x7d,0x93,0x82,0xa6]
-# CHECK-LE: mfspr 12, 531 # encoding: [0xa6,0x82,0x93,0x7d]
+# CHECK-BE: mfibatl 12, 1 # encoding: [0x7d,0x93,0x82,0xa6]
+# CHECK-LE: mfibatl 12, 1 # encoding: [0xa6,0x82,0x93,0x7d]
mfibatl %r12, 1
-# CHECK-BE: mfspr 12, 532 # encoding: [0x7d,0x94,0x82,0xa6]
-# CHECK-LE: mfspr 12, 532 # encoding: [0xa6,0x82,0x94,0x7d]
+# CHECK-BE: mfibatu 12, 2 # encoding: [0x7d,0x94,0x82,0xa6]
+# CHECK-LE: mfibatu 12, 2 # encoding: [0xa6,0x82,0x94,0x7d]
mfibatu %r12, 2
-# CHECK-BE: mfspr 12, 533 # encoding: [0x7d,0x95,0x82,0xa6]
-# CHECK-LE: mfspr 12, 533 # encoding: [0xa6,0x82,0x95,0x7d]
+# CHECK-BE: mfibatl 12, 2 # encoding: [0x7d,0x95,0x82,0xa6]
+# CHECK-LE: mfibatl 12, 2 # encoding: [0xa6,0x82,0x95,0x7d]
mfibatl %r12, 2
-# CHECK-BE: mfspr 12, 534 # encoding: [0x7d,0x96,0x82,0xa6]
-# CHECK-LE: mfspr 12, 534 # encoding: [0xa6,0x82,0x96,0x7d]
+# CHECK-BE: mfibatu 12, 3 # encoding: [0x7d,0x96,0x82,0xa6]
+# CHECK-LE: mfibatu 12, 3 # encoding: [0xa6,0x82,0x96,0x7d]
mfibatu %r12, 3
-# CHECK-BE: mfspr 12, 535 # encoding: [0x7d,0x97,0x82,0xa6]
-# CHECK-LE: mfspr 12, 535 # encoding: [0xa6,0x82,0x97,0x7d]
+# CHECK-BE: mfibatl 12, 3 # encoding: [0x7d,0x97,0x82,0xa6]
+# CHECK-LE: mfibatl 12, 3 # encoding: [0xa6,0x82,0x97,0x7d]
mfibatl %r12, 3
-# CHECK-BE: mtspr 528, 12 # encoding: [0x7d,0x90,0x83,0xa6]
-# CHECK-LE: mtspr 528, 12 # encoding: [0xa6,0x83,0x90,0x7d]
+# CHECK-BE: mtibatu 0, 12 # encoding: [0x7d,0x90,0x83,0xa6]
+# CHECK-LE: mtibatu 0, 12 # encoding: [0xa6,0x83,0x90,0x7d]
mtibatu 0, %r12
-# CHECK-BE: mtspr 529, 12 # encoding: [0x7d,0x91,0x83,0xa6]
-# CHECK-LE: mtspr 529, 12 # encoding: [0xa6,0x83,0x91,0x7d]
+# CHECK-BE: mtibatl 0, 12 # encoding: [0x7d,0x91,0x83,0xa6]
+# CHECK-LE: mtibatl 0, 12 # encoding: [0xa6,0x83,0x91,0x7d]
mtibatl 0, %r12
-# CHECK-BE: mtspr 530, 12 # encoding: [0x7d,0x92,0x83,0xa6]
-# CHECK-LE: mtspr 530, 12 # encoding: [0xa6,0x83,0x92,0x7d]
+# CHECK-BE: mtibatu 1, 12 # encoding: [0x7d,0x92,0x83,0xa6]
+# CHECK-LE: mtibatu 1, 12 # encoding: [0xa6,0x83,0x92,0x7d]
mtibatu 1, %r12
-# CHECK-BE: mtspr 531, 12 # encoding: [0x7d,0x93,0x83,0xa6]
-# CHECK-LE: mtspr 531, 12 # encoding: [0xa6,0x83,0x93,0x7d]
+# CHECK-BE: mtibatl 1, 12 # encoding: [0x7d,0x93,0x83,0xa6]
+# CHECK-LE: mtibatl 1, 12 # encoding: [0xa6,0x83,0x93,0x7d]
mtibatl 1, %r12
-# CHECK-BE: mtspr 532, 12 # encoding: [0x7d,0x94,0x83,0xa6]
-# CHECK-LE: mtspr 532, 12 # encoding: [0xa6,0x83,0x94,0x7d]
+# CHECK-BE: mtibatu 2, 12 # encoding: [0x7d,0x94,0x83,0xa6]
+# CHECK-LE: mtibatu 2, 12 # encoding: [0xa6,0x83,0x94,0x7d]
mtibatu 2, %r12
-# CHECK-BE: mtspr 533, 12 # encoding: [0x7d,0x95,0x83,0xa6]
-# CHECK-LE: mtspr 533, 12 # encoding: [0xa6,0x83,0x95,0x7d]
+# CHECK-BE: mtibatl 2, 12 # encoding: [0x7d,0x95,0x83,0xa6]
+# CHECK-LE: mtibatl 2, 12 # encoding: [0xa6,0x83,0x95,0x7d]
mtibatl 2, %r12
-# CHECK-BE: mtspr 534, 12 # encoding: [0x7d,0x96,0x83,0xa6]
-# CHECK-LE: mtspr 534, 12 # encoding: [0xa6,0x83,0x96,0x7d]
+# CHECK-BE: mtibatu 3, 12 # encoding: [0x7d,0x96,0x83,0xa6]
+# CHECK-LE: mtibatu 3, 12 # encoding: [0xa6,0x83,0x96,0x7d]
mtibatu 3, %r12
-# CHECK-BE: mtspr 535, 12 # encoding: [0x7d,0x97,0x83,0xa6]
-# CHECK-LE: mtspr 535, 12 # encoding: [0xa6,0x83,0x97,0x7d]
+# CHECK-BE: mtibatl 3, 12 # encoding: [0x7d,0x97,0x83,0xa6]
+# CHECK-LE: mtibatl 3, 12 # encoding: [0xa6,0x83,0x97,0x7d]
mtibatl 3, %r12
-# CHECK-BE: mfspr 12, 536 # encoding: [0x7d,0x98,0x82,0xa6]
-# CHECK-LE: mfspr 12, 536 # encoding: [0xa6,0x82,0x98,0x7d]
+# CHECK-BE: mfdbatu 12, 0 # encoding: [0x7d,0x98,0x82,0xa6]
+# CHECK-LE: mfdbatu 12, 0 # encoding: [0xa6,0x82,0x98,0x7d]
mfdbatu %r12, 0
-# CHECK-BE: mfspr 12, 537 # encoding: [0x7d,0x99,0x82,0xa6]
-# CHECK-LE: mfspr 12, 537 # encoding: [0xa6,0x82,0x99,0x7d]
+# CHECK-BE: mfdbatl 12, 0 # encoding: [0x7d,0x99,0x82,0xa6]
+# CHECK-LE: mfdbatl 12, 0 # encoding: [0xa6,0x82,0x99,0x7d]
mfdbatl %r12, 0
-# CHECK-BE: mfspr 12, 538 # encoding: [0x7d,0x9a,0x82,0xa6]
-# CHECK-LE: mfspr 12, 538 # encoding: [0xa6,0x82,0x9a,0x7d]
+# CHECK-BE: mfdbatu 12, 1 # encoding: [0x7d,0x9a,0x82,0xa6]
+# CHECK-LE: mfdbatu 12, 1 # encoding: [0xa6,0x82,0x9a,0x7d]
mfdbatu %r12, 1
-# CHECK-BE: mfspr 12, 539 # encoding: [0x7d,0x9b,0x82,0xa6]
-# CHECK-LE: mfspr 12, 539 # encoding: [0xa6,0x82,0x9b,0x7d]
+# CHECK-BE: mfdbatl 12, 1 # encoding: [0x7d,0x9b,0x82,0xa6]
+# CHECK-LE: mfdbatl 12, 1 # encoding: [0xa6,0x82,0x9b,0x7d]
mfdbatl %r12, 1
-# CHECK-BE: mfspr 12, 540 # encoding: [0x7d,0x9c,0x82,0xa6]
-# CHECK-LE: mfspr 12, 540 # encoding: [0xa6,0x82,0x9c,0x7d]
+# CHECK-BE: mfdbatu 12, 2 # encoding: [0x7d,0x9c,0x82,0xa6]
+# CHECK-LE: mfdbatu 12, 2 # encoding: [0xa6,0x82,0x9c,0x7d]
mfdbatu %r12, 2
-# CHECK-BE: mfspr 12, 541 # encoding: [0x7d,0x9d,0x82,0xa6]
-# CHECK-LE: mfspr 12, 541 # encoding: [0xa6,0x82,0x9d,0x7d]
+# CHECK-BE: mfdbatl 12, 2 # encoding: [0x7d,0x9d,0x82,0xa6]
+# CHECK-LE: mfdbatl 12, 2 # encoding: [0xa6,0x82,0x9d,0x7d]
mfdbatl %r12, 2
-# CHECK-BE: mfspr 12, 542 # encoding: [0x7d,0x9e,0x82,0xa6]
-# CHECK-LE: mfspr 12, 542 # encoding: [0xa6,0x82,0x9e,0x7d]
+# CHECK-BE: mfdbatu 12, 3 # encoding: [0x7d,0x9e,0x82,0xa6]
+# CHECK-LE: mfdbatu 12, 3 # encoding: [0xa6,0x82,0x9e,0x7d]
mfdbatu %r12, 3
-# CHECK-BE: mfspr 12, 543 # encoding: [0x7d,0x9f,0x82,0xa6]
-# CHECK-LE: mfspr 12, 543 # encoding: [0xa6,0x82,0x9f,0x7d]
+# CHECK-BE: mfdbatl 12, 3 # encoding: [0x7d,0x9f,0x82,0xa6]
+# CHECK-LE: mfdbatl 12, 3 # encoding: [0xa6,0x82,0x9f,0x7d]
mfdbatl %r12, 3
-# CHECK-BE: mtspr 536, 12 # encoding: [0x7d,0x98,0x83,0xa6]
-# CHECK-LE: mtspr 536, 12 # encoding: [0xa6,0x83,0x98,0x7d]
+# CHECK-BE: mtdbatu 0, 12 # encoding: [0x7d,0x98,0x83,0xa6]
+# CHECK-LE: mtdbatu 0, 12 # encoding: [0xa6,0x83,0x98,0x7d]
mtdbatu 0, %r12
-# CHECK-BE: mtspr 537, 12 # encoding: [0x7d,0x99,0x83,0xa6]
-# CHECK-LE: mtspr 537, 12 # encoding: [0xa6,0x83,0x99,0x7d]
+# CHECK-BE: mtdbatl 0, 12 # encoding: [0x7d,0x99,0x83,0xa6]
+# CHECK-LE: mtdbatl 0, 12 # encoding: [0xa6,0x83,0x99,0x7d]
mtdbatl 0, %r12
-# CHECK-BE: mtspr 538, 12 # encoding: [0x7d,0x9a,0x83,0xa6]
-# CHECK-LE: mtspr 538, 12 # encoding: [0xa6,0x83,0x9a,0x7d]
+# CHECK-BE: mtdbatu 1, 12 # encoding: [0x7d,0x9a,0x83,0xa6]
+# CHECK-LE: mtdbatu 1, 12 # encoding: [0xa6,0x83,0x9a,0x7d]
mtdbatu 1, %r12
-# CHECK-BE: mtspr 539, 12 # encoding: [0x7d,0x9b,0x83,0xa6]
-# CHECK-LE: mtspr 539, 12 # encoding: [0xa6,0x83,0x9b,0x7d]
+# CHECK-BE: mtdbatl 1, 12 # encoding: [0x7d,0x9b,0x83,0xa6]
+# CHECK-LE: mtdbatl 1, 12 # encoding: [0xa6,0x83,0x9b,0x7d]
mtdbatl 1, %r12
-# CHECK-BE: mtspr 540, 12 # encoding: [0x7d,0x9c,0x83,0xa6]
-# CHECK-LE: mtspr 540, 12 # encoding: [0xa6,0x83,0x9c,0x7d]
+# CHECK-BE: mtdbatu 2, 12 # encoding: [0x7d,0x9c,0x83,0xa6]
+# CHECK-LE: mtdbatu 2, 12 # encoding: [0xa6,0x83,0x9c,0x7d]
mtdbatu 2, %r12
-# CHECK-BE: mtspr 541, 12 # encoding: [0x7d,0x9d,0x83,0xa6]
-# CHECK-LE: mtspr 541, 12 # encoding: [0xa6,0x83,0x9d,0x7d]
+# CHECK-BE: mtdbatl 2, 12 # encoding: [0x7d,0x9d,0x83,0xa6]
+# CHECK-LE: mtdbatl 2, 12 # encoding: [0xa6,0x83,0x9d,0x7d]
mtdbatl 2, %r12
-# CHECK-BE: mtspr 542, 12 # encoding: [0x7d,0x9e,0x83,0xa6]
-# CHECK-LE: mtspr 542, 12 # encoding: [0xa6,0x83,0x9e,0x7d]
+# CHECK-BE: mtdbatu 3, 12 # encoding: [0x7d,0x9e,0x83,0xa6]
+# CHECK-LE: mtdbatu 3, 12 # encoding: [0xa6,0x83,0x9e,0x7d]
mtdbatu 3, %r12
-# CHECK-BE: mtspr 543, 12 # encoding: [0x7d,0x9f,0x83,0xa6]
-# CHECK-LE: mtspr 543, 12 # encoding: [0xa6,0x83,0x9f,0x7d]
+# CHECK-BE: mtdbatl 3, 12 # encoding: [0x7d,0x9f,0x83,0xa6]
+# CHECK-LE: mtdbatl 3, 12 # encoding: [0xa6,0x83,0x9f,0x7d]
mtdbatl 3, %r12
# CHECK-BE: tlbld 4 # encoding: [0x7c,0x00,0x27,0xa4]
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s Thu Apr 23 13:30:38 2015
@@ -43,19 +43,19 @@
# CHECK-LE: stdcx. 2, 3, 4 # encoding: [0xad,0x21,0x43,0x7c]
stdcx. 2, 3, 4
-# CHECK-BE: sync 2 # encoding: [0x7c,0x40,0x04,0xac]
-# CHECK-LE: sync 2 # encoding: [0xac,0x04,0x40,0x7c]
+# CHECK-BE: ptesync # encoding: [0x7c,0x40,0x04,0xac]
+# CHECK-LE: ptesync # encoding: [0xac,0x04,0x40,0x7c]
sync 2
# CHECK-BE: eieio # encoding: [0x7c,0x00,0x06,0xac]
# CHECK-LE: eieio # encoding: [0xac,0x06,0x00,0x7c]
eieio
-# CHECK-BE: wait 2 # encoding: [0x7c,0x40,0x00,0x7c]
-# CHECK-LE: wait 2 # encoding: [0x7c,0x00,0x40,0x7c]
+# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c]
+# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c]
wait 2
# CHECK-BE: mbar 1 # encoding: [0x7c,0x20,0x06,0xac]
# CHECK-LE: mbar 1 # encoding: [0xac,0x06,0x20,0x7c]
mbar 1
-# CHECK-BE: mbar 0
+# CHECK-BE: mbar # encoding: [0x7c,0x00,0x06,0xac]
mbar
# Extended mnemonics
@@ -103,21 +103,21 @@
# CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac]
# CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c]
msync
-# CHECK-BE: sync 1 # encoding: [0x7c,0x20,0x04,0xac]
-# CHECK-LE: sync 1 # encoding: [0xac,0x04,0x20,0x7c]
+# CHECK-BE: lwsync # encoding: [0x7c,0x20,0x04,0xac]
+# CHECK-LE: lwsync # encoding: [0xac,0x04,0x20,0x7c]
lwsync
-# CHECK-BE: sync 2 # encoding: [0x7c,0x40,0x04,0xac]
-# CHECK-LE: sync 2 # encoding: [0xac,0x04,0x40,0x7c]
+# CHECK-BE: ptesync # encoding: [0x7c,0x40,0x04,0xac]
+# CHECK-LE: ptesync # encoding: [0xac,0x04,0x40,0x7c]
ptesync
-# CHECK-BE: wait 0 # encoding: [0x7c,0x00,0x00,0x7c]
-# CHECK-LE: wait 0 # encoding: [0x7c,0x00,0x00,0x7c]
+# CHECK-BE: wait # encoding: [0x7c,0x00,0x00,0x7c]
+# CHECK-LE: wait # encoding: [0x7c,0x00,0x00,0x7c]
wait
-# CHECK-BE: wait 1 # encoding: [0x7c,0x20,0x00,0x7c]
-# CHECK-LE: wait 1 # encoding: [0x7c,0x00,0x20,0x7c]
+# CHECK-BE: waitrsv # encoding: [0x7c,0x20,0x00,0x7c]
+# CHECK-LE: waitrsv # encoding: [0x7c,0x00,0x20,0x7c]
waitrsv
-# CHECK-BE: wait 2 # encoding: [0x7c,0x40,0x00,0x7c]
-# CHECK-LE: wait 2 # encoding: [0x7c,0x00,0x40,0x7c]
+# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c]
+# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c]
waitimpl
# Time base instructions
@@ -131,13 +131,13 @@
# CHECK-BE: mftb 2, 268 # encoding: [0x7c,0x4c,0x42,0xe6]
# CHECK-LE: mftb 2, 268 # encoding: [0xe6,0x42,0x4c,0x7c]
mftbl 2
-# CHECK-BE: mftb 2, 269 # encoding: [0x7c,0x4d,0x42,0xe6]
-# CHECK-LE: mftb 2, 269 # encoding: [0xe6,0x42,0x4d,0x7c]
+# CHECK-BE: mftbu 2 # encoding: [0x7c,0x4d,0x42,0xe6]
+# CHECK-LE: mftbu 2 # encoding: [0xe6,0x42,0x4d,0x7c]
mftbu 2
-# CHECK-BE: mtspr 284, 3 # encoding: [0x7c,0x7c,0x43,0xa6]
-# CHECK-LE: mtspr 284, 3 # encoding: [0xa6,0x43,0x7c,0x7c]
+# CHECK-BE: mttbl 3 # encoding: [0x7c,0x7c,0x43,0xa6]
+# CHECK-LE: mttbl 3 # encoding: [0xa6,0x43,0x7c,0x7c]
mttbl 3
-# CHECK-BE: mtspr 285, 3 # encoding: [0x7c,0x7d,0x43,0xa6]
-# CHECK-LE: mtspr 285, 3 # encoding: [0xa6,0x43,0x7d,0x7c]
+# CHECK-BE: mttbu 3 # encoding: [0x7c,0x7d,0x43,0xa6]
+# CHECK-LE: mttbu 3 # encoding: [0xa6,0x43,0x7d,0x7c]
mttbu 3
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookIII.s Thu Apr 23 13:30:38 2015
@@ -1,8 +1,8 @@
# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
-# CHECK-BE: mtmsr 4, 0 # encoding: [0x7c,0x80,0x01,0x24]
-# CHECK-LE: mtmsr 4, 0 # encoding: [0x24,0x01,0x80,0x7c]
+# CHECK-BE: mtmsr 4 # encoding: [0x7c,0x80,0x01,0x24]
+# CHECK-LE: mtmsr 4 # encoding: [0x24,0x01,0x80,0x7c]
mtmsr %r4
# CHECK-BE: mtmsr 4, 1 # encoding: [0x7c,0x81,0x01,0x24]
@@ -13,8 +13,8 @@
# CHECK-LE: mfmsr 4 # encoding: [0xa6,0x00,0x80,0x7c]
mfmsr %r4
-# CHECK-BE: mtmsrd 4, 0 # encoding: [0x7c,0x80,0x01,0x64]
-# CHECK-LE: mtmsrd 4, 0 # encoding: [0x64,0x01,0x80,0x7c]
+# CHECK-BE: mtmsrd 4 # encoding: [0x7c,0x80,0x01,0x64]
+# CHECK-LE: mtmsrd 4 # encoding: [0x64,0x01,0x80,0x7c]
mtmsrd %r4
# CHECK-BE: mtmsrd 4, 1 # encoding: [0x7c,0x81,0x01,0x64]
@@ -94,8 +94,8 @@
# CHECK-LE: mtspr 22, 4 # encoding: [0xa6,0x03,0x96,0x7c]
mtdec %r4
-# CHECK-BE: mfspr 4, 287 # encoding: [0x7c,0x9f,0x42,0xa6]
-# CHECK-LE: mfspr 4, 287 # encoding: [0xa6,0x42,0x9f,0x7c]
+# CHECK-BE: mfpvr 4 # encoding: [0x7c,0x9f,0x42,0xa6]
+# CHECK-LE: mfpvr 4 # encoding: [0xa6,0x42,0x9f,0x7c]
mfpvr %r4
# CHECK-BE: mfspr 4, 25 # encoding: [0x7c,0x99,0x02,0xa6]
@@ -146,12 +146,12 @@
# CHECK-LE: tlbiel 4 # encoding: [0x24,0x22,0x00,0x7c]
tlbiel %r4
-# CHECK-BE: tlbie 4,0 # encoding: [0x7c,0x00,0x22,0x64]
-# CHECK-LE: tlbie 4,0 # encoding: [0x64,0x22,0x00,0x7c]
+# CHECK-BE: tlbie 4 # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4 # encoding: [0x64,0x22,0x00,0x7c]
tlbie %r4, 0
-# CHECK-BE: tlbie 4,0 # encoding: [0x7c,0x00,0x22,0x64]
-# CHECK-LE: tlbie 4,0 # encoding: [0x64,0x22,0x00,0x7c]
+# CHECK-BE: tlbie 4 # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4 # encoding: [0x64,0x22,0x00,0x7c]
tlbie %r4
# CHECK-BE: rfi # encoding: [0x4c,0x00,0x00,0x64]
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s Thu Apr 23 13:30:38 2015
@@ -29,125 +29,125 @@
# CHECK-LE: beqlr 7 # encoding: [0x20,0x00,0x9e,0x4d]
beqlr cr7
-# CHECK-BE: bclr 12, 0, 0 # encoding: [0x4d,0x80,0x00,0x20]
-# CHECK-LE: bclr 12, 0, 0 # encoding: [0x20,0x00,0x80,0x4d]
+# CHECK-BE: bclr 12, 0 # encoding: [0x4d,0x80,0x00,0x20]
+# CHECK-LE: bclr 12, 0 # encoding: [0x20,0x00,0x80,0x4d]
btlr 4*cr0+lt
-# CHECK-BE: bclr 12, 1, 0 # encoding: [0x4d,0x81,0x00,0x20]
-# CHECK-LE: bclr 12, 1, 0 # encoding: [0x20,0x00,0x81,0x4d]
+# CHECK-BE: bclr 12, 1 # encoding: [0x4d,0x81,0x00,0x20]
+# CHECK-LE: bclr 12, 1 # encoding: [0x20,0x00,0x81,0x4d]
btlr 4*cr0+gt
-# CHECK-BE: bclr 12, 2, 0 # encoding: [0x4d,0x82,0x00,0x20]
-# CHECK-LE: bclr 12, 2, 0 # encoding: [0x20,0x00,0x82,0x4d]
+# CHECK-BE: bclr 12, 2 # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: bclr 12, 2 # encoding: [0x20,0x00,0x82,0x4d]
btlr 4*cr0+eq
-# CHECK-BE: bclr 12, 3, 0 # encoding: [0x4d,0x83,0x00,0x20]
-# CHECK-LE: bclr 12, 3, 0 # encoding: [0x20,0x00,0x83,0x4d]
+# CHECK-BE: bclr 12, 3 # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bclr 12, 3 # encoding: [0x20,0x00,0x83,0x4d]
btlr 4*cr0+so
-# CHECK-BE: bclr 12, 3, 0 # encoding: [0x4d,0x83,0x00,0x20]
-# CHECK-LE: bclr 12, 3, 0 # encoding: [0x20,0x00,0x83,0x4d]
+# CHECK-BE: bclr 12, 3 # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bclr 12, 3 # encoding: [0x20,0x00,0x83,0x4d]
btlr 4*cr0+un
-# CHECK-BE: bclr 12, 4, 0 # encoding: [0x4d,0x84,0x00,0x20]
-# CHECK-LE: bclr 12, 4, 0 # encoding: [0x20,0x00,0x84,0x4d]
+# CHECK-BE: bclr 12, 4 # encoding: [0x4d,0x84,0x00,0x20]
+# CHECK-LE: bclr 12, 4 # encoding: [0x20,0x00,0x84,0x4d]
btlr 4*cr1+lt
-# CHECK-BE: bclr 12, 5, 0 # encoding: [0x4d,0x85,0x00,0x20]
-# CHECK-LE: bclr 12, 5, 0 # encoding: [0x20,0x00,0x85,0x4d]
+# CHECK-BE: bclr 12, 5 # encoding: [0x4d,0x85,0x00,0x20]
+# CHECK-LE: bclr 12, 5 # encoding: [0x20,0x00,0x85,0x4d]
btlr 4*cr1+gt
-# CHECK-BE: bclr 12, 6, 0 # encoding: [0x4d,0x86,0x00,0x20]
-# CHECK-LE: bclr 12, 6, 0 # encoding: [0x20,0x00,0x86,0x4d]
+# CHECK-BE: bclr 12, 6 # encoding: [0x4d,0x86,0x00,0x20]
+# CHECK-LE: bclr 12, 6 # encoding: [0x20,0x00,0x86,0x4d]
btlr 4*cr1+eq
-# CHECK-BE: bclr 12, 7, 0 # encoding: [0x4d,0x87,0x00,0x20]
-# CHECK-LE: bclr 12, 7, 0 # encoding: [0x20,0x00,0x87,0x4d]
+# CHECK-BE: bclr 12, 7 # encoding: [0x4d,0x87,0x00,0x20]
+# CHECK-LE: bclr 12, 7 # encoding: [0x20,0x00,0x87,0x4d]
btlr 4*cr1+so
-# CHECK-BE: bclr 12, 7, 0 # encoding: [0x4d,0x87,0x00,0x20]
-# CHECK-LE: bclr 12, 7, 0 # encoding: [0x20,0x00,0x87,0x4d]
+# CHECK-BE: bclr 12, 7 # encoding: [0x4d,0x87,0x00,0x20]
+# CHECK-LE: bclr 12, 7 # encoding: [0x20,0x00,0x87,0x4d]
btlr 4*cr1+un
-# CHECK-BE: bclr 12, 8, 0 # encoding: [0x4d,0x88,0x00,0x20]
-# CHECK-LE: bclr 12, 8, 0 # encoding: [0x20,0x00,0x88,0x4d]
+# CHECK-BE: bclr 12, 8 # encoding: [0x4d,0x88,0x00,0x20]
+# CHECK-LE: bclr 12, 8 # encoding: [0x20,0x00,0x88,0x4d]
btlr 4*cr2+lt
-# CHECK-BE: bclr 12, 9, 0 # encoding: [0x4d,0x89,0x00,0x20]
-# CHECK-LE: bclr 12, 9, 0 # encoding: [0x20,0x00,0x89,0x4d]
+# CHECK-BE: bclr 12, 9 # encoding: [0x4d,0x89,0x00,0x20]
+# CHECK-LE: bclr 12, 9 # encoding: [0x20,0x00,0x89,0x4d]
btlr 4*cr2+gt
-# CHECK-BE: bclr 12, 10, 0 # encoding: [0x4d,0x8a,0x00,0x20]
-# CHECK-LE: bclr 12, 10, 0 # encoding: [0x20,0x00,0x8a,0x4d]
+# CHECK-BE: bclr 12, 10 # encoding: [0x4d,0x8a,0x00,0x20]
+# CHECK-LE: bclr 12, 10 # encoding: [0x20,0x00,0x8a,0x4d]
btlr 4*cr2+eq
-# CHECK-BE: bclr 12, 11, 0 # encoding: [0x4d,0x8b,0x00,0x20]
-# CHECK-LE: bclr 12, 11, 0 # encoding: [0x20,0x00,0x8b,0x4d]
+# CHECK-BE: bclr 12, 11 # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bclr 12, 11 # encoding: [0x20,0x00,0x8b,0x4d]
btlr 4*cr2+so
-# CHECK-BE: bclr 12, 11, 0 # encoding: [0x4d,0x8b,0x00,0x20]
-# CHECK-LE: bclr 12, 11, 0 # encoding: [0x20,0x00,0x8b,0x4d]
+# CHECK-BE: bclr 12, 11 # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bclr 12, 11 # encoding: [0x20,0x00,0x8b,0x4d]
btlr 4*cr2+un
-# CHECK-BE: bclr 12, 12, 0 # encoding: [0x4d,0x8c,0x00,0x20]
-# CHECK-LE: bclr 12, 12, 0 # encoding: [0x20,0x00,0x8c,0x4d]
+# CHECK-BE: bclr 12, 12 # encoding: [0x4d,0x8c,0x00,0x20]
+# CHECK-LE: bclr 12, 12 # encoding: [0x20,0x00,0x8c,0x4d]
btlr 4*cr3+lt
-# CHECK-BE: bclr 12, 13, 0 # encoding: [0x4d,0x8d,0x00,0x20]
-# CHECK-LE: bclr 12, 13, 0 # encoding: [0x20,0x00,0x8d,0x4d]
+# CHECK-BE: bclr 12, 13 # encoding: [0x4d,0x8d,0x00,0x20]
+# CHECK-LE: bclr 12, 13 # encoding: [0x20,0x00,0x8d,0x4d]
btlr 4*cr3+gt
-# CHECK-BE: bclr 12, 14, 0 # encoding: [0x4d,0x8e,0x00,0x20]
-# CHECK-LE: bclr 12, 14, 0 # encoding: [0x20,0x00,0x8e,0x4d]
+# CHECK-BE: bclr 12, 14 # encoding: [0x4d,0x8e,0x00,0x20]
+# CHECK-LE: bclr 12, 14 # encoding: [0x20,0x00,0x8e,0x4d]
btlr 4*cr3+eq
-# CHECK-BE: bclr 12, 15, 0 # encoding: [0x4d,0x8f,0x00,0x20]
-# CHECK-LE: bclr 12, 15, 0 # encoding: [0x20,0x00,0x8f,0x4d]
+# CHECK-BE: bclr 12, 15 # encoding: [0x4d,0x8f,0x00,0x20]
+# CHECK-LE: bclr 12, 15 # encoding: [0x20,0x00,0x8f,0x4d]
btlr 4*cr3+so
-# CHECK-BE: bclr 12, 15, 0 # encoding: [0x4d,0x8f,0x00,0x20]
-# CHECK-LE: bclr 12, 15, 0 # encoding: [0x20,0x00,0x8f,0x4d]
+# CHECK-BE: bclr 12, 15 # encoding: [0x4d,0x8f,0x00,0x20]
+# CHECK-LE: bclr 12, 15 # encoding: [0x20,0x00,0x8f,0x4d]
btlr 4*cr3+un
-# CHECK-BE: bclr 12, 16, 0 # encoding: [0x4d,0x90,0x00,0x20]
-# CHECK-LE: bclr 12, 16, 0 # encoding: [0x20,0x00,0x90,0x4d]
+# CHECK-BE: bclr 12, 16 # encoding: [0x4d,0x90,0x00,0x20]
+# CHECK-LE: bclr 12, 16 # encoding: [0x20,0x00,0x90,0x4d]
btlr 4*cr4+lt
-# CHECK-BE: bclr 12, 17, 0 # encoding: [0x4d,0x91,0x00,0x20]
-# CHECK-LE: bclr 12, 17, 0 # encoding: [0x20,0x00,0x91,0x4d]
+# CHECK-BE: bclr 12, 17 # encoding: [0x4d,0x91,0x00,0x20]
+# CHECK-LE: bclr 12, 17 # encoding: [0x20,0x00,0x91,0x4d]
btlr 4*cr4+gt
-# CHECK-BE: bclr 12, 18, 0 # encoding: [0x4d,0x92,0x00,0x20]
-# CHECK-LE: bclr 12, 18, 0 # encoding: [0x20,0x00,0x92,0x4d]
+# CHECK-BE: bclr 12, 18 # encoding: [0x4d,0x92,0x00,0x20]
+# CHECK-LE: bclr 12, 18 # encoding: [0x20,0x00,0x92,0x4d]
btlr 4*cr4+eq
-# CHECK-BE: bclr 12, 19, 0 # encoding: [0x4d,0x93,0x00,0x20]
-# CHECK-LE: bclr 12, 19, 0 # encoding: [0x20,0x00,0x93,0x4d]
+# CHECK-BE: bclr 12, 19 # encoding: [0x4d,0x93,0x00,0x20]
+# CHECK-LE: bclr 12, 19 # encoding: [0x20,0x00,0x93,0x4d]
btlr 4*cr4+so
-# CHECK-BE: bclr 12, 19, 0 # encoding: [0x4d,0x93,0x00,0x20]
-# CHECK-LE: bclr 12, 19, 0 # encoding: [0x20,0x00,0x93,0x4d]
+# CHECK-BE: bclr 12, 19 # encoding: [0x4d,0x93,0x00,0x20]
+# CHECK-LE: bclr 12, 19 # encoding: [0x20,0x00,0x93,0x4d]
btlr 4*cr4+un
-# CHECK-BE: bclr 12, 20, 0 # encoding: [0x4d,0x94,0x00,0x20]
-# CHECK-LE: bclr 12, 20, 0 # encoding: [0x20,0x00,0x94,0x4d]
+# CHECK-BE: bclr 12, 20 # encoding: [0x4d,0x94,0x00,0x20]
+# CHECK-LE: bclr 12, 20 # encoding: [0x20,0x00,0x94,0x4d]
btlr 4*cr5+lt
-# CHECK-BE: bclr 12, 21, 0 # encoding: [0x4d,0x95,0x00,0x20]
-# CHECK-LE: bclr 12, 21, 0 # encoding: [0x20,0x00,0x95,0x4d]
+# CHECK-BE: bclr 12, 21 # encoding: [0x4d,0x95,0x00,0x20]
+# CHECK-LE: bclr 12, 21 # encoding: [0x20,0x00,0x95,0x4d]
btlr 4*cr5+gt
-# CHECK-BE: bclr 12, 22, 0 # encoding: [0x4d,0x96,0x00,0x20]
-# CHECK-LE: bclr 12, 22, 0 # encoding: [0x20,0x00,0x96,0x4d]
+# CHECK-BE: bclr 12, 22 # encoding: [0x4d,0x96,0x00,0x20]
+# CHECK-LE: bclr 12, 22 # encoding: [0x20,0x00,0x96,0x4d]
btlr 4*cr5+eq
-# CHECK-BE: bclr 12, 23, 0 # encoding: [0x4d,0x97,0x00,0x20]
-# CHECK-LE: bclr 12, 23, 0 # encoding: [0x20,0x00,0x97,0x4d]
+# CHECK-BE: bclr 12, 23 # encoding: [0x4d,0x97,0x00,0x20]
+# CHECK-LE: bclr 12, 23 # encoding: [0x20,0x00,0x97,0x4d]
btlr 4*cr5+so
-# CHECK-BE: bclr 12, 23, 0 # encoding: [0x4d,0x97,0x00,0x20]
-# CHECK-LE: bclr 12, 23, 0 # encoding: [0x20,0x00,0x97,0x4d]
+# CHECK-BE: bclr 12, 23 # encoding: [0x4d,0x97,0x00,0x20]
+# CHECK-LE: bclr 12, 23 # encoding: [0x20,0x00,0x97,0x4d]
btlr 4*cr5+un
-# CHECK-BE: bclr 12, 24, 0 # encoding: [0x4d,0x98,0x00,0x20]
-# CHECK-LE: bclr 12, 24, 0 # encoding: [0x20,0x00,0x98,0x4d]
+# CHECK-BE: bclr 12, 24 # encoding: [0x4d,0x98,0x00,0x20]
+# CHECK-LE: bclr 12, 24 # encoding: [0x20,0x00,0x98,0x4d]
btlr 4*cr6+lt
-# CHECK-BE: bclr 12, 25, 0 # encoding: [0x4d,0x99,0x00,0x20]
-# CHECK-LE: bclr 12, 25, 0 # encoding: [0x20,0x00,0x99,0x4d]
+# CHECK-BE: bclr 12, 25 # encoding: [0x4d,0x99,0x00,0x20]
+# CHECK-LE: bclr 12, 25 # encoding: [0x20,0x00,0x99,0x4d]
btlr 4*cr6+gt
-# CHECK-BE: bclr 12, 26, 0 # encoding: [0x4d,0x9a,0x00,0x20]
-# CHECK-LE: bclr 12, 26, 0 # encoding: [0x20,0x00,0x9a,0x4d]
+# CHECK-BE: bclr 12, 26 # encoding: [0x4d,0x9a,0x00,0x20]
+# CHECK-LE: bclr 12, 26 # encoding: [0x20,0x00,0x9a,0x4d]
btlr 4*cr6+eq
-# CHECK-BE: bclr 12, 27, 0 # encoding: [0x4d,0x9b,0x00,0x20]
-# CHECK-LE: bclr 12, 27, 0 # encoding: [0x20,0x00,0x9b,0x4d]
+# CHECK-BE: bclr 12, 27 # encoding: [0x4d,0x9b,0x00,0x20]
+# CHECK-LE: bclr 12, 27 # encoding: [0x20,0x00,0x9b,0x4d]
btlr 4*cr6+so
-# CHECK-BE: bclr 12, 27, 0 # encoding: [0x4d,0x9b,0x00,0x20]
-# CHECK-LE: bclr 12, 27, 0 # encoding: [0x20,0x00,0x9b,0x4d]
+# CHECK-BE: bclr 12, 27 # encoding: [0x4d,0x9b,0x00,0x20]
+# CHECK-LE: bclr 12, 27 # encoding: [0x20,0x00,0x9b,0x4d]
btlr 4*cr6+un
-# CHECK-BE: bclr 12, 28, 0 # encoding: [0x4d,0x9c,0x00,0x20]
-# CHECK-LE: bclr 12, 28, 0 # encoding: [0x20,0x00,0x9c,0x4d]
+# CHECK-BE: bclr 12, 28 # encoding: [0x4d,0x9c,0x00,0x20]
+# CHECK-LE: bclr 12, 28 # encoding: [0x20,0x00,0x9c,0x4d]
btlr 4*cr7+lt
-# CHECK-BE: bclr 12, 29, 0 # encoding: [0x4d,0x9d,0x00,0x20]
-# CHECK-LE: bclr 12, 29, 0 # encoding: [0x20,0x00,0x9d,0x4d]
+# CHECK-BE: bclr 12, 29 # encoding: [0x4d,0x9d,0x00,0x20]
+# CHECK-LE: bclr 12, 29 # encoding: [0x20,0x00,0x9d,0x4d]
btlr 4*cr7+gt
-# CHECK-BE: bclr 12, 30, 0 # encoding: [0x4d,0x9e,0x00,0x20]
-# CHECK-LE: bclr 12, 30, 0 # encoding: [0x20,0x00,0x9e,0x4d]
+# CHECK-BE: bclr 12, 30 # encoding: [0x4d,0x9e,0x00,0x20]
+# CHECK-LE: bclr 12, 30 # encoding: [0x20,0x00,0x9e,0x4d]
btlr 4*cr7+eq
-# CHECK-BE: bclr 12, 31, 0 # encoding: [0x4d,0x9f,0x00,0x20]
-# CHECK-LE: bclr 12, 31, 0 # encoding: [0x20,0x00,0x9f,0x4d]
+# CHECK-BE: bclr 12, 31 # encoding: [0x4d,0x9f,0x00,0x20]
+# CHECK-LE: bclr 12, 31 # encoding: [0x20,0x00,0x9f,0x4d]
btlr 4*cr7+so
-# CHECK-BE: bclr 12, 31, 0 # encoding: [0x4d,0x9f,0x00,0x20]
-# CHECK-LE: bclr 12, 31, 0 # encoding: [0x20,0x00,0x9f,0x4d]
+# CHECK-BE: bclr 12, 31 # encoding: [0x4d,0x9f,0x00,0x20]
+# CHECK-LE: bclr 12, 31 # encoding: [0x20,0x00,0x9f,0x4d]
btlr 4*cr7+un
# Branch mnemonics
@@ -165,202 +165,202 @@
# CHECK-LE: bctrl # encoding: [0x21,0x04,0x80,0x4e]
bctrl
-# CHECK-BE: bc 12, 2, target # encoding: [0x41,0x82,A,0bAAAAAA00]
-# CHECK-LE: bc 12, 2, target # encoding: [0bAAAAAA00,A,0x82,0x41]
+# CHECK-BE: bt 2, target # encoding: [0x41,0x82,A,0bAAAAAA00]
+# CHECK-LE: bt 2, target # encoding: [0bAAAAAA00,A,0x82,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bt 2, target
-# CHECK-BE: bca 12, 2, target # encoding: [0x41,0x82,A,0bAAAAAA10]
-# CHECK-LE: bca 12, 2, target # encoding: [0bAAAAAA10,A,0x82,0x41]
+# CHECK-BE: bta 2, target # encoding: [0x41,0x82,A,0bAAAAAA10]
+# CHECK-LE: bta 2, target # encoding: [0bAAAAAA10,A,0x82,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bta 2, target
-# CHECK-BE: bclr 12, 2, 0 # encoding: [0x4d,0x82,0x00,0x20]
-# CHECK-LE: bclr 12, 2, 0 # encoding: [0x20,0x00,0x82,0x4d]
+# CHECK-BE: bclr 12, 2 # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: bclr 12, 2 # encoding: [0x20,0x00,0x82,0x4d]
btlr 2
-# CHECK-BE: bcctr 12, 2, 0 # encoding: [0x4d,0x82,0x04,0x20]
-# CHECK-LE: bcctr 12, 2, 0 # encoding: [0x20,0x04,0x82,0x4d]
+# CHECK-BE: bcctr 12, 2 # encoding: [0x4d,0x82,0x04,0x20]
+# CHECK-LE: bcctr 12, 2 # encoding: [0x20,0x04,0x82,0x4d]
btctr 2
-# CHECK-BE: bcl 12, 2, target # encoding: [0x41,0x82,A,0bAAAAAA01]
-# CHECK-LE: bcl 12, 2, target # encoding: [0bAAAAAA01,A,0x82,0x41]
+# CHECK-BE: btl 2, target # encoding: [0x41,0x82,A,0bAAAAAA01]
+# CHECK-LE: btl 2, target # encoding: [0bAAAAAA01,A,0x82,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
btl 2, target
-# CHECK-BE: bcla 12, 2, target # encoding: [0x41,0x82,A,0bAAAAAA11]
-# CHECK-LE: bcla 12, 2, target # encoding: [0bAAAAAA11,A,0x82,0x41]
+# CHECK-BE: btla 2, target # encoding: [0x41,0x82,A,0bAAAAAA11]
+# CHECK-LE: btla 2, target # encoding: [0bAAAAAA11,A,0x82,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
btla 2, target
-# CHECK-BE: bclrl 12, 2, 0 # encoding: [0x4d,0x82,0x00,0x21]
-# CHECK-LE: bclrl 12, 2, 0 # encoding: [0x21,0x00,0x82,0x4d]
+# CHECK-BE: bclrl 12, 2 # encoding: [0x4d,0x82,0x00,0x21]
+# CHECK-LE: bclrl 12, 2 # encoding: [0x21,0x00,0x82,0x4d]
btlrl 2
-# CHECK-BE: bcctrl 12, 2, 0 # encoding: [0x4d,0x82,0x04,0x21]
-# CHECK-LE: bcctrl 12, 2, 0 # encoding: [0x21,0x04,0x82,0x4d]
+# CHECK-BE: bcctrl 12, 2 # encoding: [0x4d,0x82,0x04,0x21]
+# CHECK-LE: bcctrl 12, 2 # encoding: [0x21,0x04,0x82,0x4d]
btctrl 2
-# CHECK-BE: bc 15, 2, target # encoding: [0x41,0xe2,A,0bAAAAAA00]
-# CHECK-LE: bc 15, 2, target # encoding: [0bAAAAAA00,A,0xe2,0x41]
+# CHECK-BE: bt+ 2, target # encoding: [0x41,0xe2,A,0bAAAAAA00]
+# CHECK-LE: bt+ 2, target # encoding: [0bAAAAAA00,A,0xe2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bt+ 2, target
-# CHECK-BE: bca 15, 2, target # encoding: [0x41,0xe2,A,0bAAAAAA10]
-# CHECK-LE: bca 15, 2, target # encoding: [0bAAAAAA10,A,0xe2,0x41]
+# CHECK-BE: bta+ 2, target # encoding: [0x41,0xe2,A,0bAAAAAA10]
+# CHECK-LE: bta+ 2, target # encoding: [0bAAAAAA10,A,0xe2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bta+ 2, target
-# CHECK-BE: bclr 15, 2, 0 # encoding: [0x4d,0xe2,0x00,0x20]
-# CHECK-LE: bclr 15, 2, 0 # encoding: [0x20,0x00,0xe2,0x4d]
+# CHECK-BE: bclr 15, 2 # encoding: [0x4d,0xe2,0x00,0x20]
+# CHECK-LE: bclr 15, 2 # encoding: [0x20,0x00,0xe2,0x4d]
btlr+ 2
-# CHECK-BE: bcctr 15, 2, 0 # encoding: [0x4d,0xe2,0x04,0x20]
-# CHECK-LE: bcctr 15, 2, 0 # encoding: [0x20,0x04,0xe2,0x4d]
+# CHECK-BE: bcctr 15, 2 # encoding: [0x4d,0xe2,0x04,0x20]
+# CHECK-LE: bcctr 15, 2 # encoding: [0x20,0x04,0xe2,0x4d]
btctr+ 2
-# CHECK-BE: bcl 15, 2, target # encoding: [0x41,0xe2,A,0bAAAAAA01]
-# CHECK-LE: bcl 15, 2, target # encoding: [0bAAAAAA01,A,0xe2,0x41]
+# CHECK-BE: btl+ 2, target # encoding: [0x41,0xe2,A,0bAAAAAA01]
+# CHECK-LE: btl+ 2, target # encoding: [0bAAAAAA01,A,0xe2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
btl+ 2, target
-# CHECK-BE: bcla 15, 2, target # encoding: [0x41,0xe2,A,0bAAAAAA11]
-# CHECK-LE: bcla 15, 2, target # encoding: [0bAAAAAA11,A,0xe2,0x41]
+# CHECK-BE: btla+ 2, target # encoding: [0x41,0xe2,A,0bAAAAAA11]
+# CHECK-LE: btla+ 2, target # encoding: [0bAAAAAA11,A,0xe2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
btla+ 2, target
-# CHECK-BE: bclrl 15, 2, 0 # encoding: [0x4d,0xe2,0x00,0x21]
-# CHECK-LE: bclrl 15, 2, 0 # encoding: [0x21,0x00,0xe2,0x4d]
+# CHECK-BE: bclrl 15, 2 # encoding: [0x4d,0xe2,0x00,0x21]
+# CHECK-LE: bclrl 15, 2 # encoding: [0x21,0x00,0xe2,0x4d]
btlrl+ 2
-# CHECK-BE: bcctrl 15, 2, 0 # encoding: [0x4d,0xe2,0x04,0x21]
-# CHECK-LE: bcctrl 15, 2, 0 # encoding: [0x21,0x04,0xe2,0x4d]
+# CHECK-BE: bcctrl 15, 2 # encoding: [0x4d,0xe2,0x04,0x21]
+# CHECK-LE: bcctrl 15, 2 # encoding: [0x21,0x04,0xe2,0x4d]
btctrl+ 2
-# CHECK-BE: bc 14, 2, target # encoding: [0x41,0xc2,A,0bAAAAAA00]
-# CHECK-LE: bc 14, 2, target # encoding: [0bAAAAAA00,A,0xc2,0x41]
+# CHECK-BE: bt- 2, target # encoding: [0x41,0xc2,A,0bAAAAAA00]
+# CHECK-LE: bt- 2, target # encoding: [0bAAAAAA00,A,0xc2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bt- 2, target
-# CHECK-BE: bca 14, 2, target # encoding: [0x41,0xc2,A,0bAAAAAA10]
-# CHECK-LE: bca 14, 2, target # encoding: [0bAAAAAA10,A,0xc2,0x41]
+# CHECK-BE: bta- 2, target # encoding: [0x41,0xc2,A,0bAAAAAA10]
+# CHECK-LE: bta- 2, target # encoding: [0bAAAAAA10,A,0xc2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bta- 2, target
-# CHECK-BE: bclr 14, 2, 0 # encoding: [0x4d,0xc2,0x00,0x20]
-# CHECK-LE: bclr 14, 2, 0 # encoding: [0x20,0x00,0xc2,0x4d]
+# CHECK-BE: bclr 14, 2 # encoding: [0x4d,0xc2,0x00,0x20]
+# CHECK-LE: bclr 14, 2 # encoding: [0x20,0x00,0xc2,0x4d]
btlr- 2
-# CHECK-BE: bcctr 14, 2, 0 # encoding: [0x4d,0xc2,0x04,0x20]
-# CHECK-LE: bcctr 14, 2, 0 # encoding: [0x20,0x04,0xc2,0x4d]
+# CHECK-BE: bcctr 14, 2 # encoding: [0x4d,0xc2,0x04,0x20]
+# CHECK-LE: bcctr 14, 2 # encoding: [0x20,0x04,0xc2,0x4d]
btctr- 2
-# CHECK-BE: bcl 14, 2, target # encoding: [0x41,0xc2,A,0bAAAAAA01]
-# CHECK-LE: bcl 14, 2, target # encoding: [0bAAAAAA01,A,0xc2,0x41]
+# CHECK-BE: btl- 2, target # encoding: [0x41,0xc2,A,0bAAAAAA01]
+# CHECK-LE: btl- 2, target # encoding: [0bAAAAAA01,A,0xc2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
btl- 2, target
-# CHECK-BE: bcla 14, 2, target # encoding: [0x41,0xc2,A,0bAAAAAA11]
-# CHECK-LE: bcla 14, 2, target # encoding: [0bAAAAAA11,A,0xc2,0x41]
+# CHECK-BE: btla- 2, target # encoding: [0x41,0xc2,A,0bAAAAAA11]
+# CHECK-LE: btla- 2, target # encoding: [0bAAAAAA11,A,0xc2,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
btla- 2, target
-# CHECK-BE: bclrl 14, 2, 0 # encoding: [0x4d,0xc2,0x00,0x21]
-# CHECK-LE: bclrl 14, 2, 0 # encoding: [0x21,0x00,0xc2,0x4d]
+# CHECK-BE: bclrl 14, 2 # encoding: [0x4d,0xc2,0x00,0x21]
+# CHECK-LE: bclrl 14, 2 # encoding: [0x21,0x00,0xc2,0x4d]
btlrl- 2
-# CHECK-BE: bcctrl 14, 2, 0 # encoding: [0x4d,0xc2,0x04,0x21]
-# CHECK-LE: bcctrl 14, 2, 0 # encoding: [0x21,0x04,0xc2,0x4d]
+# CHECK-BE: bcctrl 14, 2 # encoding: [0x4d,0xc2,0x04,0x21]
+# CHECK-LE: bcctrl 14, 2 # encoding: [0x21,0x04,0xc2,0x4d]
btctrl- 2
-# CHECK-BE: bc 4, 2, target # encoding: [0x40,0x82,A,0bAAAAAA00]
-# CHECK-LE: bc 4, 2, target # encoding: [0bAAAAAA00,A,0x82,0x40]
+# CHECK-BE: bf 2, target # encoding: [0x40,0x82,A,0bAAAAAA00]
+# CHECK-LE: bf 2, target # encoding: [0bAAAAAA00,A,0x82,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bf 2, target
-# CHECK-BE: bca 4, 2, target # encoding: [0x40,0x82,A,0bAAAAAA10]
-# CHECK-LE: bca 4, 2, target # encoding: [0bAAAAAA10,A,0x82,0x40]
+# CHECK-BE: bfa 2, target # encoding: [0x40,0x82,A,0bAAAAAA10]
+# CHECK-LE: bfa 2, target # encoding: [0bAAAAAA10,A,0x82,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfa 2, target
-# CHECK-BE: bclr 4, 2, 0 # encoding: [0x4c,0x82,0x00,0x20]
-# CHECK-LE: bclr 4, 2, 0 # encoding: [0x20,0x00,0x82,0x4c]
+# CHECK-BE: bclr 4, 2 # encoding: [0x4c,0x82,0x00,0x20]
+# CHECK-LE: bclr 4, 2 # encoding: [0x20,0x00,0x82,0x4c]
bflr 2
-# CHECK-BE: bcctr 4, 2, 0 # encoding: [0x4c,0x82,0x04,0x20]
-# CHECK-LE: bcctr 4, 2, 0 # encoding: [0x20,0x04,0x82,0x4c]
+# CHECK-BE: bcctr 4, 2 # encoding: [0x4c,0x82,0x04,0x20]
+# CHECK-LE: bcctr 4, 2 # encoding: [0x20,0x04,0x82,0x4c]
bfctr 2
-# CHECK-BE: bcl 4, 2, target # encoding: [0x40,0x82,A,0bAAAAAA01]
-# CHECK-LE: bcl 4, 2, target # encoding: [0bAAAAAA01,A,0x82,0x40]
+# CHECK-BE: bfl 2, target # encoding: [0x40,0x82,A,0bAAAAAA01]
+# CHECK-LE: bfl 2, target # encoding: [0bAAAAAA01,A,0x82,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bfl 2, target
-# CHECK-BE: bcla 4, 2, target # encoding: [0x40,0x82,A,0bAAAAAA11]
-# CHECK-LE: bcla 4, 2, target # encoding: [0bAAAAAA11,A,0x82,0x40]
+# CHECK-BE: bfla 2, target # encoding: [0x40,0x82,A,0bAAAAAA11]
+# CHECK-LE: bfla 2, target # encoding: [0bAAAAAA11,A,0x82,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfla 2, target
-# CHECK-BE: bclrl 4, 2, 0 # encoding: [0x4c,0x82,0x00,0x21]
-# CHECK-LE: bclrl 4, 2, 0 # encoding: [0x21,0x00,0x82,0x4c]
+# CHECK-BE: bclrl 4, 2 # encoding: [0x4c,0x82,0x00,0x21]
+# CHECK-LE: bclrl 4, 2 # encoding: [0x21,0x00,0x82,0x4c]
bflrl 2
-# CHECK-BE: bcctrl 4, 2, 0 # encoding: [0x4c,0x82,0x04,0x21]
-# CHECK-LE: bcctrl 4, 2, 0 # encoding: [0x21,0x04,0x82,0x4c]
+# CHECK-BE: bcctrl 4, 2 # encoding: [0x4c,0x82,0x04,0x21]
+# CHECK-LE: bcctrl 4, 2 # encoding: [0x21,0x04,0x82,0x4c]
bfctrl 2
-# CHECK-BE: bc 7, 2, target # encoding: [0x40,0xe2,A,0bAAAAAA00]
-# CHECK-LE: bc 7, 2, target # encoding: [0bAAAAAA00,A,0xe2,0x40]
+# CHECK-BE: bf+ 2, target # encoding: [0x40,0xe2,A,0bAAAAAA00]
+# CHECK-LE: bf+ 2, target # encoding: [0bAAAAAA00,A,0xe2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bf+ 2, target
-# CHECK-BE: bca 7, 2, target # encoding: [0x40,0xe2,A,0bAAAAAA10]
-# CHECK-LE: bca 7, 2, target # encoding: [0bAAAAAA10,A,0xe2,0x40]
+# CHECK-BE: bfa+ 2, target # encoding: [0x40,0xe2,A,0bAAAAAA10]
+# CHECK-LE: bfa+ 2, target # encoding: [0bAAAAAA10,A,0xe2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfa+ 2, target
-# CHECK-BE: bclr 7, 2, 0 # encoding: [0x4c,0xe2,0x00,0x20]
-# CHECK-LE: bclr 7, 2, 0 # encoding: [0x20,0x00,0xe2,0x4c]
+# CHECK-BE: bclr 7, 2 # encoding: [0x4c,0xe2,0x00,0x20]
+# CHECK-LE: bclr 7, 2 # encoding: [0x20,0x00,0xe2,0x4c]
bflr+ 2
-# CHECK-BE: bcctr 7, 2, 0 # encoding: [0x4c,0xe2,0x04,0x20]
-# CHECK-LE: bcctr 7, 2, 0 # encoding: [0x20,0x04,0xe2,0x4c]
+# CHECK-BE: bcctr 7, 2 # encoding: [0x4c,0xe2,0x04,0x20]
+# CHECK-LE: bcctr 7, 2 # encoding: [0x20,0x04,0xe2,0x4c]
bfctr+ 2
-# CHECK-BE: bcl 7, 2, target # encoding: [0x40,0xe2,A,0bAAAAAA01]
-# CHECK-LE: bcl 7, 2, target # encoding: [0bAAAAAA01,A,0xe2,0x40]
+# CHECK-BE: bfl+ 2, target # encoding: [0x40,0xe2,A,0bAAAAAA01]
+# CHECK-LE: bfl+ 2, target # encoding: [0bAAAAAA01,A,0xe2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bfl+ 2, target
-# CHECK-BE: bcla 7, 2, target # encoding: [0x40,0xe2,A,0bAAAAAA11]
-# CHECK-LE: bcla 7, 2, target # encoding: [0bAAAAAA11,A,0xe2,0x40]
+# CHECK-BE: bfla+ 2, target # encoding: [0x40,0xe2,A,0bAAAAAA11]
+# CHECK-LE: bfla+ 2, target # encoding: [0bAAAAAA11,A,0xe2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfla+ 2, target
-# CHECK-BE: bclrl 7, 2, 0 # encoding: [0x4c,0xe2,0x00,0x21]
-# CHECK-LE: bclrl 7, 2, 0 # encoding: [0x21,0x00,0xe2,0x4c]
+# CHECK-BE: bclrl 7, 2 # encoding: [0x4c,0xe2,0x00,0x21]
+# CHECK-LE: bclrl 7, 2 # encoding: [0x21,0x00,0xe2,0x4c]
bflrl+ 2
-# CHECK-BE: bcctrl 7, 2, 0 # encoding: [0x4c,0xe2,0x04,0x21]
-# CHECK-LE: bcctrl 7, 2, 0 # encoding: [0x21,0x04,0xe2,0x4c]
+# CHECK-BE: bcctrl 7, 2 # encoding: [0x4c,0xe2,0x04,0x21]
+# CHECK-LE: bcctrl 7, 2 # encoding: [0x21,0x04,0xe2,0x4c]
bfctrl+ 2
-# CHECK-BE: bc 6, 2, target # encoding: [0x40,0xc2,A,0bAAAAAA00]
-# CHECK-LE: bc 6, 2, target # encoding: [0bAAAAAA00,A,0xc2,0x40]
+# CHECK-BE: bf- 2, target # encoding: [0x40,0xc2,A,0bAAAAAA00]
+# CHECK-LE: bf- 2, target # encoding: [0bAAAAAA00,A,0xc2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bf- 2, target
-# CHECK-BE: bca 6, 2, target # encoding: [0x40,0xc2,A,0bAAAAAA10]
-# CHECK-LE: bca 6, 2, target # encoding: [0bAAAAAA10,A,0xc2,0x40]
+# CHECK-BE: bfa- 2, target # encoding: [0x40,0xc2,A,0bAAAAAA10]
+# CHECK-LE: bfa- 2, target # encoding: [0bAAAAAA10,A,0xc2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfa- 2, target
-# CHECK-BE: bclr 6, 2, 0 # encoding: [0x4c,0xc2,0x00,0x20]
-# CHECK-LE: bclr 6, 2, 0 # encoding: [0x20,0x00,0xc2,0x4c]
+# CHECK-BE: bclr 6, 2 # encoding: [0x4c,0xc2,0x00,0x20]
+# CHECK-LE: bclr 6, 2 # encoding: [0x20,0x00,0xc2,0x4c]
bflr- 2
-# CHECK-BE: bcctr 6, 2, 0 # encoding: [0x4c,0xc2,0x04,0x20]
-# CHECK-LE: bcctr 6, 2, 0 # encoding: [0x20,0x04,0xc2,0x4c]
+# CHECK-BE: bcctr 6, 2 # encoding: [0x4c,0xc2,0x04,0x20]
+# CHECK-LE: bcctr 6, 2 # encoding: [0x20,0x04,0xc2,0x4c]
bfctr- 2
-# CHECK-BE: bcl 6, 2, target # encoding: [0x40,0xc2,A,0bAAAAAA01]
-# CHECK-LE: bcl 6, 2, target # encoding: [0bAAAAAA01,A,0xc2,0x40]
+# CHECK-BE: bfl- 2, target # encoding: [0x40,0xc2,A,0bAAAAAA01]
+# CHECK-LE: bfl- 2, target # encoding: [0bAAAAAA01,A,0xc2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bfl- 2, target
-# CHECK-BE: bcla 6, 2, target # encoding: [0x40,0xc2,A,0bAAAAAA11]
-# CHECK-LE: bcla 6, 2, target # encoding: [0bAAAAAA11,A,0xc2,0x40]
+# CHECK-BE: bfla- 2, target # encoding: [0x40,0xc2,A,0bAAAAAA11]
+# CHECK-LE: bfla- 2, target # encoding: [0bAAAAAA11,A,0xc2,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bfla- 2, target
-# CHECK-BE: bclrl 6, 2, 0 # encoding: [0x4c,0xc2,0x00,0x21]
-# CHECK-LE: bclrl 6, 2, 0 # encoding: [0x21,0x00,0xc2,0x4c]
+# CHECK-BE: bclrl 6, 2 # encoding: [0x4c,0xc2,0x00,0x21]
+# CHECK-LE: bclrl 6, 2 # encoding: [0x21,0x00,0xc2,0x4c]
bflrl- 2
-# CHECK-BE: bcctrl 6, 2, 0 # encoding: [0x4c,0xc2,0x04,0x21]
-# CHECK-LE: bcctrl 6, 2, 0 # encoding: [0x21,0x04,0xc2,0x4c]
+# CHECK-BE: bcctrl 6, 2 # encoding: [0x4c,0xc2,0x04,0x21]
+# CHECK-LE: bcctrl 6, 2 # encoding: [0x21,0x04,0xc2,0x4c]
bfctrl- 2
# CHECK-BE: bdnz target # encoding: [0x42,0x00,A,0bAAAAAA00]
@@ -444,58 +444,58 @@
# CHECK-LE: bdnzlrl- # encoding: [0x21,0x00,0x00,0x4f]
bdnzlrl-
-# CHECK-BE: bc 8, 2, target # encoding: [0x41,0x02,A,0bAAAAAA00]
-# CHECK-LE: bc 8, 2, target # encoding: [0bAAAAAA00,A,0x02,0x41]
+# CHECK-BE: bdnzt 2, target # encoding: [0x41,0x02,A,0bAAAAAA00]
+# CHECK-LE: bdnzt 2, target # encoding: [0bAAAAAA00,A,0x02,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdnzt 2, target
-# CHECK-BE: bca 8, 2, target # encoding: [0x41,0x02,A,0bAAAAAA10]
-# CHECK-LE: bca 8, 2, target # encoding: [0bAAAAAA10,A,0x02,0x41]
+# CHECK-BE: bdnzta 2, target # encoding: [0x41,0x02,A,0bAAAAAA10]
+# CHECK-LE: bdnzta 2, target # encoding: [0bAAAAAA10,A,0x02,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdnzta 2, target
-# CHECK-BE: bclr 8, 2, 0 # encoding: [0x4d,0x02,0x00,0x20]
-# CHECK-LE: bclr 8, 2, 0 # encoding: [0x20,0x00,0x02,0x4d]
+# CHECK-BE: bclr 8, 2 # encoding: [0x4d,0x02,0x00,0x20]
+# CHECK-LE: bclr 8, 2 # encoding: [0x20,0x00,0x02,0x4d]
bdnztlr 2
-# CHECK-BE: bcl 8, 2, target # encoding: [0x41,0x02,A,0bAAAAAA01]
-# CHECK-LE: bcl 8, 2, target # encoding: [0bAAAAAA01,A,0x02,0x41]
+# CHECK-BE: bdnztl 2, target # encoding: [0x41,0x02,A,0bAAAAAA01]
+# CHECK-LE: bdnztl 2, target # encoding: [0bAAAAAA01,A,0x02,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdnztl 2, target
-# CHECK-BE: bcla 8, 2, target # encoding: [0x41,0x02,A,0bAAAAAA11]
-# CHECK-LE: bcla 8, 2, target # encoding: [0bAAAAAA11,A,0x02,0x41]
+# CHECK-BE: bdnztla 2, target # encoding: [0x41,0x02,A,0bAAAAAA11]
+# CHECK-LE: bdnztla 2, target # encoding: [0bAAAAAA11,A,0x02,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdnztla 2, target
-# CHECK-BE: bclrl 8, 2, 0 # encoding: [0x4d,0x02,0x00,0x21]
-# CHECK-LE: bclrl 8, 2, 0 # encoding: [0x21,0x00,0x02,0x4d]
+# CHECK-BE: bclrl 8, 2 # encoding: [0x4d,0x02,0x00,0x21]
+# CHECK-LE: bclrl 8, 2 # encoding: [0x21,0x00,0x02,0x4d]
bdnztlrl 2
-# CHECK-BE: bc 0, 2, target # encoding: [0x40,0x02,A,0bAAAAAA00]
-# CHECK-LE: bc 0, 2, target # encoding: [0bAAAAAA00,A,0x02,0x40]
+# CHECK-BE: bdnzf 2, target # encoding: [0x40,0x02,A,0bAAAAAA00]
+# CHECK-LE: bdnzf 2, target # encoding: [0bAAAAAA00,A,0x02,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdnzf 2, target
-# CHECK-BE: bca 0, 2, target # encoding: [0x40,0x02,A,0bAAAAAA10]
-# CHECK-LE: bca 0, 2, target # encoding: [0bAAAAAA10,A,0x02,0x40]
+# CHECK-BE: bdnzfa 2, target # encoding: [0x40,0x02,A,0bAAAAAA10]
+# CHECK-LE: bdnzfa 2, target # encoding: [0bAAAAAA10,A,0x02,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdnzfa 2, target
-# CHECK-BE: bclr 0, 2, 0 # encoding: [0x4c,0x02,0x00,0x20]
-# CHECK-LE: bclr 0, 2, 0 # encoding: [0x20,0x00,0x02,0x4c]
+# CHECK-BE: bclr 0, 2 # encoding: [0x4c,0x02,0x00,0x20]
+# CHECK-LE: bclr 0, 2 # encoding: [0x20,0x00,0x02,0x4c]
bdnzflr 2
-# CHECK-BE: bcl 0, 2, target # encoding: [0x40,0x02,A,0bAAAAAA01]
-# CHECK-LE: bcl 0, 2, target # encoding: [0bAAAAAA01,A,0x02,0x40]
+# CHECK-BE: bdnzfl 2, target # encoding: [0x40,0x02,A,0bAAAAAA01]
+# CHECK-LE: bdnzfl 2, target # encoding: [0bAAAAAA01,A,0x02,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdnzfl 2, target
-# CHECK-BE: bcla 0, 2, target # encoding: [0x40,0x02,A,0bAAAAAA11]
-# CHECK-LE: bcla 0, 2, target # encoding: [0bAAAAAA11,A,0x02,0x40]
+# CHECK-BE: bdnzfla 2, target # encoding: [0x40,0x02,A,0bAAAAAA11]
+# CHECK-LE: bdnzfla 2, target # encoding: [0bAAAAAA11,A,0x02,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdnzfla 2, target
-# CHECK-BE: bclrl 0, 2, 0 # encoding: [0x4c,0x02,0x00,0x21]
-# CHECK-LE: bclrl 0, 2, 0 # encoding: [0x21,0x00,0x02,0x4c]
+# CHECK-BE: bclrl 0, 2 # encoding: [0x4c,0x02,0x00,0x21]
+# CHECK-LE: bclrl 0, 2 # encoding: [0x21,0x00,0x02,0x4c]
bdnzflrl 2
# CHECK-BE: bdz target # encoding: [0x42,0x40,A,0bAAAAAA00]
@@ -579,58 +579,58 @@
# CHECK-LE: bdzlrl- # encoding: [0x21,0x00,0x40,0x4f]
bdzlrl-
-# CHECK-BE: bc 10, 2, target # encoding: [0x41,0x42,A,0bAAAAAA00]
-# CHECK-LE: bc 10, 2, target # encoding: [0bAAAAAA00,A,0x42,0x41]
+# CHECK-BE: bdzt 2, target # encoding: [0x41,0x42,A,0bAAAAAA00]
+# CHECK-LE: bdzt 2, target # encoding: [0bAAAAAA00,A,0x42,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdzt 2, target
-# CHECK-BE: bca 10, 2, target # encoding: [0x41,0x42,A,0bAAAAAA10]
-# CHECK-LE: bca 10, 2, target # encoding: [0bAAAAAA10,A,0x42,0x41]
+# CHECK-BE: bdzta 2, target # encoding: [0x41,0x42,A,0bAAAAAA10]
+# CHECK-LE: bdzta 2, target # encoding: [0bAAAAAA10,A,0x42,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdzta 2, target
-# CHECK-BE: bclr 10, 2, 0 # encoding: [0x4d,0x42,0x00,0x20]
-# CHECK-LE: bclr 10, 2, 0 # encoding: [0x20,0x00,0x42,0x4d]
+# CHECK-BE: bclr 10, 2 # encoding: [0x4d,0x42,0x00,0x20]
+# CHECK-LE: bclr 10, 2 # encoding: [0x20,0x00,0x42,0x4d]
bdztlr 2
-# CHECK-BE: bcl 10, 2, target # encoding: [0x41,0x42,A,0bAAAAAA01]
-# CHECK-LE: bcl 10, 2, target # encoding: [0bAAAAAA01,A,0x42,0x41]
+# CHECK-BE: bdztl 2, target # encoding: [0x41,0x42,A,0bAAAAAA01]
+# CHECK-LE: bdztl 2, target # encoding: [0bAAAAAA01,A,0x42,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdztl 2, target
-# CHECK-BE: bcla 10, 2, target # encoding: [0x41,0x42,A,0bAAAAAA11]
-# CHECK-LE: bcla 10, 2, target # encoding: [0bAAAAAA11,A,0x42,0x41]
+# CHECK-BE: bdztla 2, target # encoding: [0x41,0x42,A,0bAAAAAA11]
+# CHECK-LE: bdztla 2, target # encoding: [0bAAAAAA11,A,0x42,0x41]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdztla 2, target
-# CHECK-BE: bclrl 10, 2, 0 # encoding: [0x4d,0x42,0x00,0x21]
-# CHECK-LE: bclrl 10, 2, 0 # encoding: [0x21,0x00,0x42,0x4d]
+# CHECK-BE: bclrl 10, 2 # encoding: [0x4d,0x42,0x00,0x21]
+# CHECK-LE: bclrl 10, 2 # encoding: [0x21,0x00,0x42,0x4d]
bdztlrl 2
-# CHECK-BE: bc 2, 2, target # encoding: [0x40,0x42,A,0bAAAAAA00]
-# CHECK-LE: bc 2, 2, target # encoding: [0bAAAAAA00,A,0x42,0x40]
+# CHECK-BE: bdzf 2, target # encoding: [0x40,0x42,A,0bAAAAAA00]
+# CHECK-LE: bdzf 2, target # encoding: [0bAAAAAA00,A,0x42,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdzf 2, target
-# CHECK-BE: bca 2, 2, target # encoding: [0x40,0x42,A,0bAAAAAA10]
-# CHECK-LE: bca 2, 2, target # encoding: [0bAAAAAA10,A,0x42,0x40]
+# CHECK-BE: bdzfa 2, target # encoding: [0x40,0x42,A,0bAAAAAA10]
+# CHECK-LE: bdzfa 2, target # encoding: [0bAAAAAA10,A,0x42,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdzfa 2, target
-# CHECK-BE: bclr 2, 2, 0 # encoding: [0x4c,0x42,0x00,0x20]
-# CHECK-LE: bclr 2, 2, 0 # encoding: [0x20,0x00,0x42,0x4c]
+# CHECK-BE: bclr 2, 2 # encoding: [0x4c,0x42,0x00,0x20]
+# CHECK-LE: bclr 2, 2 # encoding: [0x20,0x00,0x42,0x4c]
bdzflr 2
-# CHECK-BE: bcl 2, 2, target # encoding: [0x40,0x42,A,0bAAAAAA01]
-# CHECK-LE: bcl 2, 2, target # encoding: [0bAAAAAA01,A,0x42,0x40]
+# CHECK-BE: bdzfl 2, target # encoding: [0x40,0x42,A,0bAAAAAA01]
+# CHECK-LE: bdzfl 2, target # encoding: [0bAAAAAA01,A,0x42,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bdzfl 2, target
-# CHECK-BE: bcla 2, 2, target # encoding: [0x40,0x42,A,0bAAAAAA11]
-# CHECK-LE: bcla 2, 2, target # encoding: [0bAAAAAA11,A,0x42,0x40]
+# CHECK-BE: bdzfla 2, target # encoding: [0x40,0x42,A,0bAAAAAA11]
+# CHECK-LE: bdzfla 2, target # encoding: [0bAAAAAA11,A,0x42,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bdzfla 2, target
-# CHECK-BE: bclrl 2, 2, 0 # encoding: [0x4c,0x42,0x00,0x21]
-# CHECK-LE: bclrl 2, 2, 0 # encoding: [0x21,0x00,0x42,0x4c]
+# CHECK-BE: bclrl 2, 2 # encoding: [0x4c,0x42,0x00,0x21]
+# CHECK-LE: bclrl 2, 2 # encoding: [0x21,0x00,0x42,0x4c]
bdzflrl 2
# CHECK-BE: blt 2, target # encoding: [0x41,0x88,A,0bAAAAAA00]
@@ -2975,17 +2975,17 @@
# Condition register logical mnemonics
-# CHECK-BE: creqv 2, 2, 2 # encoding: [0x4c,0x42,0x12,0x42]
-# CHECK-LE: creqv 2, 2, 2 # encoding: [0x42,0x12,0x42,0x4c]
+# CHECK-BE: crset 2 # encoding: [0x4c,0x42,0x12,0x42]
+# CHECK-LE: crset 2 # encoding: [0x42,0x12,0x42,0x4c]
crset 2
-# CHECK-BE: crxor 2, 2, 2 # encoding: [0x4c,0x42,0x11,0x82]
-# CHECK-LE: crxor 2, 2, 2 # encoding: [0x82,0x11,0x42,0x4c]
+# CHECK-BE: crclr 2 # encoding: [0x4c,0x42,0x11,0x82]
+# CHECK-LE: crclr 2 # encoding: [0x82,0x11,0x42,0x4c]
crclr 2
-# CHECK-BE: cror 2, 3, 3 # encoding: [0x4c,0x43,0x1b,0x82]
-# CHECK-LE: cror 2, 3, 3 # encoding: [0x82,0x1b,0x43,0x4c]
+# CHECK-BE: crmove 2, 3 # encoding: [0x4c,0x43,0x1b,0x82]
+# CHECK-LE: crmove 2, 3 # encoding: [0x82,0x1b,0x43,0x4c]
crmove 2, 3
-# CHECK-BE: crnor 2, 3, 3 # encoding: [0x4c,0x43,0x18,0x42]
-# CHECK-LE: crnor 2, 3, 3 # encoding: [0x42,0x18,0x43,0x4c]
+# CHECK-BE: crnot 2, 3 # encoding: [0x4c,0x43,0x18,0x42]
+# CHECK-LE: crnot 2, 3 # encoding: [0x42,0x18,0x43,0x4c]
crnot 2, 3
# Subtract mnemonics
@@ -3003,17 +3003,17 @@
# CHECK-LE: addic. 2, 3, -128 # encoding: [0x80,0xff,0x43,0x34]
subic. 2, 3, 128
-# CHECK-BE: subf 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x50]
-# CHECK-LE: subf 2, 4, 3 # encoding: [0x50,0x18,0x44,0x7c]
+# CHECK-BE: sub 2, 3, 4 # encoding: [0x7c,0x44,0x18,0x50]
+# CHECK-LE: sub 2, 3, 4 # encoding: [0x50,0x18,0x44,0x7c]
sub 2, 3, 4
-# CHECK-BE: subf. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x51]
-# CHECK-LE: subf. 2, 4, 3 # encoding: [0x51,0x18,0x44,0x7c]
+# CHECK-BE: sub. 2, 3, 4 # encoding: [0x7c,0x44,0x18,0x51]
+# CHECK-LE: sub. 2, 3, 4 # encoding: [0x51,0x18,0x44,0x7c]
sub. 2, 3, 4
-# CHECK-BE: subfc 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x10]
-# CHECK-LE: subfc 2, 4, 3 # encoding: [0x10,0x18,0x44,0x7c]
+# CHECK-BE: subc 2, 3, 4 # encoding: [0x7c,0x44,0x18,0x10]
+# CHECK-LE: subc 2, 3, 4 # encoding: [0x10,0x18,0x44,0x7c]
subc 2, 3, 4
-# CHECK-BE: subfc. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x11]
-# CHECK-LE: subfc. 2, 4, 3 # encoding: [0x11,0x18,0x44,0x7c]
+# CHECK-BE: subc. 2, 3, 4 # encoding: [0x7c,0x44,0x18,0x11]
+# CHECK-LE: subc. 2, 3, 4 # encoding: [0x11,0x18,0x44,0x7c]
subc. 2, 3, 4
# Compare mnemonics
@@ -3021,66 +3021,66 @@
# CHECK-BE: cmpdi 2, 3, 128 # encoding: [0x2d,0x23,0x00,0x80]
# CHECK-LE: cmpdi 2, 3, 128 # encoding: [0x80,0x00,0x23,0x2d]
cmpdi 2, 3, 128
-# CHECK-BE: cmpdi 0, 3, 128 # encoding: [0x2c,0x23,0x00,0x80]
-# CHECK-LE: cmpdi 0, 3, 128 # encoding: [0x80,0x00,0x23,0x2c]
+# CHECK-BE: cmpdi 3, 128 # encoding: [0x2c,0x23,0x00,0x80]
+# CHECK-LE: cmpdi 3, 128 # encoding: [0x80,0x00,0x23,0x2c]
cmpdi 3, 128
# CHECK-BE: cmpd 2, 3, 4 # encoding: [0x7d,0x23,0x20,0x00]
# CHECK-LE: cmpd 2, 3, 4 # encoding: [0x00,0x20,0x23,0x7d]
cmpd 2, 3, 4
-# CHECK-BE: cmpd 0, 3, 4 # encoding: [0x7c,0x23,0x20,0x00]
-# CHECK-LE: cmpd 0, 3, 4 # encoding: [0x00,0x20,0x23,0x7c]
+# CHECK-BE: cmpd 3, 4 # encoding: [0x7c,0x23,0x20,0x00]
+# CHECK-LE: cmpd 3, 4 # encoding: [0x00,0x20,0x23,0x7c]
cmpd 3, 4
# CHECK-BE: cmpldi 2, 3, 128 # encoding: [0x29,0x23,0x00,0x80]
# CHECK-LE: cmpldi 2, 3, 128 # encoding: [0x80,0x00,0x23,0x29]
cmpldi 2, 3, 128
-# CHECK-BE: cmpldi 0, 3, 128 # encoding: [0x28,0x23,0x00,0x80]
-# CHECK-LE: cmpldi 0, 3, 128 # encoding: [0x80,0x00,0x23,0x28]
+# CHECK-BE: cmpldi 3, 128 # encoding: [0x28,0x23,0x00,0x80]
+# CHECK-LE: cmpldi 3, 128 # encoding: [0x80,0x00,0x23,0x28]
cmpldi 3, 128
# CHECK-BE: cmpld 2, 3, 4 # encoding: [0x7d,0x23,0x20,0x40]
# CHECK-LE: cmpld 2, 3, 4 # encoding: [0x40,0x20,0x23,0x7d]
cmpld 2, 3, 4
-# CHECK-BE: cmpld 0, 3, 4 # encoding: [0x7c,0x23,0x20,0x40]
-# CHECK-LE: cmpld 0, 3, 4 # encoding: [0x40,0x20,0x23,0x7c]
+# CHECK-BE: cmpld 3, 4 # encoding: [0x7c,0x23,0x20,0x40]
+# CHECK-LE: cmpld 3, 4 # encoding: [0x40,0x20,0x23,0x7c]
cmpld 3, 4
# CHECK-BE: cmpwi 2, 3, 128 # encoding: [0x2d,0x03,0x00,0x80]
# CHECK-LE: cmpwi 2, 3, 128 # encoding: [0x80,0x00,0x03,0x2d]
cmpwi 2, 3, 128
-# CHECK-BE: cmpwi 0, 3, 128 # encoding: [0x2c,0x03,0x00,0x80]
-# CHECK-LE: cmpwi 0, 3, 128 # encoding: [0x80,0x00,0x03,0x2c]
+# CHECK-BE: cmpwi 3, 128 # encoding: [0x2c,0x03,0x00,0x80]
+# CHECK-LE: cmpwi 3, 128 # encoding: [0x80,0x00,0x03,0x2c]
cmpwi 3, 128
# CHECK-BE: cmpw 2, 3, 4 # encoding: [0x7d,0x03,0x20,0x00]
# CHECK-LE: cmpw 2, 3, 4 # encoding: [0x00,0x20,0x03,0x7d]
cmpw 2, 3, 4
-# CHECK-BE: cmpw 0, 3, 4 # encoding: [0x7c,0x03,0x20,0x00]
-# CHECK-LE: cmpw 0, 3, 4 # encoding: [0x00,0x20,0x03,0x7c]
+# CHECK-BE: cmpw 3, 4 # encoding: [0x7c,0x03,0x20,0x00]
+# CHECK-LE: cmpw 3, 4 # encoding: [0x00,0x20,0x03,0x7c]
cmpw 3, 4
# CHECK-BE: cmplwi 2, 3, 128 # encoding: [0x29,0x03,0x00,0x80]
# CHECK-LE: cmplwi 2, 3, 128 # encoding: [0x80,0x00,0x03,0x29]
cmplwi 2, 3, 128
-# CHECK-BE: cmplwi 0, 3, 128 # encoding: [0x28,0x03,0x00,0x80]
-# CHECK-LE: cmplwi 0, 3, 128 # encoding: [0x80,0x00,0x03,0x28]
+# CHECK-BE: cmplwi 3, 128 # encoding: [0x28,0x03,0x00,0x80]
+# CHECK-LE: cmplwi 3, 128 # encoding: [0x80,0x00,0x03,0x28]
cmplwi 3, 128
# CHECK-BE: cmplw 2, 3, 4 # encoding: [0x7d,0x03,0x20,0x40]
# CHECK-LE: cmplw 2, 3, 4 # encoding: [0x40,0x20,0x03,0x7d]
cmplw 2, 3, 4
-# CHECK-BE: cmplw 0, 3, 4 # encoding: [0x7c,0x03,0x20,0x40]
-# CHECK-LE: cmplw 0, 3, 4 # encoding: [0x40,0x20,0x03,0x7c]
+# CHECK-BE: cmplw 3, 4 # encoding: [0x7c,0x03,0x20,0x40]
+# CHECK-LE: cmplw 3, 4 # encoding: [0x40,0x20,0x03,0x7c]
cmplw 3, 4
# Trap mnemonics
-# CHECK-BE: twi 16, 3, 4 # encoding: [0x0e,0x03,0x00,0x04]
-# CHECK-LE: twi 16, 3, 4 # encoding: [0x04,0x00,0x03,0x0e]
+# CHECK-BE: twlti 3, 4 # encoding: [0x0e,0x03,0x00,0x04]
+# CHECK-LE: twlti 3, 4 # encoding: [0x04,0x00,0x03,0x0e]
twlti 3, 4
-# CHECK-BE: tw 16, 3, 4 # encoding: [0x7e,0x03,0x20,0x08]
-# CHECK-LE: tw 16, 3, 4 # encoding: [0x08,0x20,0x03,0x7e]
+# CHECK-BE: twlt 3, 4 # encoding: [0x7e,0x03,0x20,0x08]
+# CHECK-LE: twlt 3, 4 # encoding: [0x08,0x20,0x03,0x7e]
twlt 3, 4
-# CHECK-BE: tdi 16, 3, 4 # encoding: [0x0a,0x03,0x00,0x04]
-# CHECK-LE: tdi 16, 3, 4 # encoding: [0x04,0x00,0x03,0x0a]
+# CHECK-BE: tdlti 3, 4 # encoding: [0x0a,0x03,0x00,0x04]
+# CHECK-LE: tdlti 3, 4 # encoding: [0x04,0x00,0x03,0x0a]
tdlti 3, 4
-# CHECK-BE: td 16, 3, 4 # encoding: [0x7e,0x03,0x20,0x88]
-# CHECK-LE: td 16, 3, 4 # encoding: [0x88,0x20,0x03,0x7e]
+# CHECK-BE: tdlt 3, 4 # encoding: [0x7e,0x03,0x20,0x88]
+# CHECK-LE: tdlt 3, 4 # encoding: [0x88,0x20,0x03,0x7e]
tdlt 3, 4
# CHECK-BE: twi 20, 3, 4 # encoding: [0x0e,0x83,0x00,0x04]
@@ -3096,17 +3096,17 @@
# CHECK-LE: td 20, 3, 4 # encoding: [0x88,0x20,0x83,0x7e]
tdle 3, 4
-# CHECK-BE: twi 4, 3, 4 # encoding: [0x0c,0x83,0x00,0x04]
-# CHECK-LE: twi 4, 3, 4 # encoding: [0x04,0x00,0x83,0x0c]
+# CHECK-BE: tweqi 3, 4 # encoding: [0x0c,0x83,0x00,0x04]
+# CHECK-LE: tweqi 3, 4 # encoding: [0x04,0x00,0x83,0x0c]
tweqi 3, 4
-# CHECK-BE: tw 4, 3, 4 # encoding: [0x7c,0x83,0x20,0x08]
-# CHECK-LE: tw 4, 3, 4 # encoding: [0x08,0x20,0x83,0x7c]
+# CHECK-BE: tweq 3, 4 # encoding: [0x7c,0x83,0x20,0x08]
+# CHECK-LE: tweq 3, 4 # encoding: [0x08,0x20,0x83,0x7c]
tweq 3, 4
-# CHECK-BE: tdi 4, 3, 4 # encoding: [0x08,0x83,0x00,0x04]
-# CHECK-LE: tdi 4, 3, 4 # encoding: [0x04,0x00,0x83,0x08]
+# CHECK-BE: tdeqi 3, 4 # encoding: [0x08,0x83,0x00,0x04]
+# CHECK-LE: tdeqi 3, 4 # encoding: [0x04,0x00,0x83,0x08]
tdeqi 3, 4
-# CHECK-BE: td 4, 3, 4 # encoding: [0x7c,0x83,0x20,0x88]
-# CHECK-LE: td 4, 3, 4 # encoding: [0x88,0x20,0x83,0x7c]
+# CHECK-BE: tdeq 3, 4 # encoding: [0x7c,0x83,0x20,0x88]
+# CHECK-LE: tdeq 3, 4 # encoding: [0x88,0x20,0x83,0x7c]
tdeq 3, 4
# CHECK-BE: twi 12, 3, 4 # encoding: [0x0d,0x83,0x00,0x04]
@@ -3122,17 +3122,17 @@
# CHECK-LE: td 12, 3, 4 # encoding: [0x88,0x20,0x83,0x7d]
tdge 3, 4
-# CHECK-BE: twi 8, 3, 4 # encoding: [0x0d,0x03,0x00,0x04]
-# CHECK-LE: twi 8, 3, 4 # encoding: [0x04,0x00,0x03,0x0d]
+# CHECK-BE: twgti 3, 4 # encoding: [0x0d,0x03,0x00,0x04]
+# CHECK-LE: twgti 3, 4 # encoding: [0x04,0x00,0x03,0x0d]
twgti 3, 4
-# CHECK-BE: tw 8, 3, 4 # encoding: [0x7d,0x03,0x20,0x08]
-# CHECK-LE: tw 8, 3, 4 # encoding: [0x08,0x20,0x03,0x7d]
+# CHECK-BE: twgt 3, 4 # encoding: [0x7d,0x03,0x20,0x08]
+# CHECK-LE: twgt 3, 4 # encoding: [0x08,0x20,0x03,0x7d]
twgt 3, 4
-# CHECK-BE: tdi 8, 3, 4 # encoding: [0x09,0x03,0x00,0x04]
-# CHECK-LE: tdi 8, 3, 4 # encoding: [0x04,0x00,0x03,0x09]
+# CHECK-BE: tdgti 3, 4 # encoding: [0x09,0x03,0x00,0x04]
+# CHECK-LE: tdgti 3, 4 # encoding: [0x04,0x00,0x03,0x09]
tdgti 3, 4
-# CHECK-BE: td 8, 3, 4 # encoding: [0x7d,0x03,0x20,0x88]
-# CHECK-LE: td 8, 3, 4 # encoding: [0x88,0x20,0x03,0x7d]
+# CHECK-BE: tdgt 3, 4 # encoding: [0x7d,0x03,0x20,0x88]
+# CHECK-LE: tdgt 3, 4 # encoding: [0x88,0x20,0x03,0x7d]
tdgt 3, 4
# CHECK-BE: twi 12, 3, 4 # encoding: [0x0d,0x83,0x00,0x04]
@@ -3148,17 +3148,17 @@
# CHECK-LE: td 12, 3, 4 # encoding: [0x88,0x20,0x83,0x7d]
tdnl 3, 4
-# CHECK-BE: twi 24, 3, 4 # encoding: [0x0f,0x03,0x00,0x04]
-# CHECK-LE: twi 24, 3, 4 # encoding: [0x04,0x00,0x03,0x0f]
+# CHECK-BE: twnei 3, 4 # encoding: [0x0f,0x03,0x00,0x04]
+# CHECK-LE: twnei 3, 4 # encoding: [0x04,0x00,0x03,0x0f]
twnei 3, 4
-# CHECK-BE: tw 24, 3, 4 # encoding: [0x7f,0x03,0x20,0x08]
-# CHECK-LE: tw 24, 3, 4 # encoding: [0x08,0x20,0x03,0x7f]
+# CHECK-BE: twne 3, 4 # encoding: [0x7f,0x03,0x20,0x08]
+# CHECK-LE: twne 3, 4 # encoding: [0x08,0x20,0x03,0x7f]
twne 3, 4
-# CHECK-BE: tdi 24, 3, 4 # encoding: [0x0b,0x03,0x00,0x04]
-# CHECK-LE: tdi 24, 3, 4 # encoding: [0x04,0x00,0x03,0x0b]
+# CHECK-BE: tdnei 3, 4 # encoding: [0x0b,0x03,0x00,0x04]
+# CHECK-LE: tdnei 3, 4 # encoding: [0x04,0x00,0x03,0x0b]
tdnei 3, 4
-# CHECK-BE: td 24, 3, 4 # encoding: [0x7f,0x03,0x20,0x88]
-# CHECK-LE: td 24, 3, 4 # encoding: [0x88,0x20,0x03,0x7f]
+# CHECK-BE: tdne 3, 4 # encoding: [0x7f,0x03,0x20,0x88]
+# CHECK-LE: tdne 3, 4 # encoding: [0x88,0x20,0x03,0x7f]
tdne 3, 4
# CHECK-BE: twi 20, 3, 4 # encoding: [0x0e,0x83,0x00,0x04]
@@ -3174,17 +3174,17 @@
# CHECK-LE: td 20, 3, 4 # encoding: [0x88,0x20,0x83,0x7e]
tdng 3, 4
-# CHECK-BE: twi 2, 3, 4 # encoding: [0x0c,0x43,0x00,0x04]
-# CHECK-LE: twi 2, 3, 4 # encoding: [0x04,0x00,0x43,0x0c]
+# CHECK-BE: twllti 3, 4 # encoding: [0x0c,0x43,0x00,0x04]
+# CHECK-LE: twllti 3, 4 # encoding: [0x04,0x00,0x43,0x0c]
twllti 3, 4
-# CHECK-BE: tw 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x08]
-# CHECK-LE: tw 2, 3, 4 # encoding: [0x08,0x20,0x43,0x7c]
+# CHECK-BE: twllt 3, 4 # encoding: [0x7c,0x43,0x20,0x08]
+# CHECK-LE: twllt 3, 4 # encoding: [0x08,0x20,0x43,0x7c]
twllt 3, 4
-# CHECK-BE: tdi 2, 3, 4 # encoding: [0x08,0x43,0x00,0x04]
-# CHECK-LE: tdi 2, 3, 4 # encoding: [0x04,0x00,0x43,0x08]
+# CHECK-BE: tdllti 3, 4 # encoding: [0x08,0x43,0x00,0x04]
+# CHECK-LE: tdllti 3, 4 # encoding: [0x04,0x00,0x43,0x08]
tdllti 3, 4
-# CHECK-BE: td 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x88]
-# CHECK-LE: td 2, 3, 4 # encoding: [0x88,0x20,0x43,0x7c]
+# CHECK-BE: tdllt 3, 4 # encoding: [0x7c,0x43,0x20,0x88]
+# CHECK-LE: tdllt 3, 4 # encoding: [0x88,0x20,0x43,0x7c]
tdllt 3, 4
# CHECK-BE: twi 6, 3, 4 # encoding: [0x0c,0xc3,0x00,0x04]
@@ -3213,17 +3213,17 @@
# CHECK-LE: td 5, 3, 4 # encoding: [0x88,0x20,0xa3,0x7c]
tdlge 3, 4
-# CHECK-BE: twi 1, 3, 4 # encoding: [0x0c,0x23,0x00,0x04]
-# CHECK-LE: twi 1, 3, 4 # encoding: [0x04,0x00,0x23,0x0c]
+# CHECK-BE: twlgti 3, 4 # encoding: [0x0c,0x23,0x00,0x04]
+# CHECK-LE: twlgti 3, 4 # encoding: [0x04,0x00,0x23,0x0c]
twlgti 3, 4
-# CHECK-BE: tw 1, 3, 4 # encoding: [0x7c,0x23,0x20,0x08]
-# CHECK-LE: tw 1, 3, 4 # encoding: [0x08,0x20,0x23,0x7c]
+# CHECK-BE: twlgt 3, 4 # encoding: [0x7c,0x23,0x20,0x08]
+# CHECK-LE: twlgt 3, 4 # encoding: [0x08,0x20,0x23,0x7c]
twlgt 3, 4
-# CHECK-BE: tdi 1, 3, 4 # encoding: [0x08,0x23,0x00,0x04]
-# CHECK-LE: tdi 1, 3, 4 # encoding: [0x04,0x00,0x23,0x08]
+# CHECK-BE: tdlgti 3, 4 # encoding: [0x08,0x23,0x00,0x04]
+# CHECK-LE: tdlgti 3, 4 # encoding: [0x04,0x00,0x23,0x08]
tdlgti 3, 4
-# CHECK-BE: td 1, 3, 4 # encoding: [0x7c,0x23,0x20,0x88]
-# CHECK-LE: td 1, 3, 4 # encoding: [0x88,0x20,0x23,0x7c]
+# CHECK-BE: tdlgt 3, 4 # encoding: [0x7c,0x23,0x20,0x88]
+# CHECK-LE: tdlgt 3, 4 # encoding: [0x88,0x20,0x23,0x7c]
tdlgt 3, 4
# CHECK-BE: twi 5, 3, 4 # encoding: [0x0c,0xa3,0x00,0x04]
@@ -3252,17 +3252,17 @@
# CHECK-LE: td 6, 3, 4 # encoding: [0x88,0x20,0xc3,0x7c]
tdlng 3, 4
-# CHECK-BE: twi 31, 3, 4 # encoding: [0x0f,0xe3,0x00,0x04]
-# CHECK-LE: twi 31, 3, 4 # encoding: [0x04,0x00,0xe3,0x0f]
+# CHECK-BE: twui 3, 4 # encoding: [0x0f,0xe3,0x00,0x04]
+# CHECK-LE: twui 3, 4 # encoding: [0x04,0x00,0xe3,0x0f]
twui 3, 4
-# CHECK-BE: tw 31, 3, 4 # encoding: [0x7f,0xe3,0x20,0x08]
-# CHECK-LE: tw 31, 3, 4 # encoding: [0x08,0x20,0xe3,0x7f]
+# CHECK-BE: twu 3, 4 # encoding: [0x7f,0xe3,0x20,0x08]
+# CHECK-LE: twu 3, 4 # encoding: [0x08,0x20,0xe3,0x7f]
twu 3, 4
-# CHECK-BE: tdi 31, 3, 4 # encoding: [0x0b,0xe3,0x00,0x04]
-# CHECK-LE: tdi 31, 3, 4 # encoding: [0x04,0x00,0xe3,0x0b]
+# CHECK-BE: tdui 3, 4 # encoding: [0x0b,0xe3,0x00,0x04]
+# CHECK-LE: tdui 3, 4 # encoding: [0x04,0x00,0xe3,0x0b]
tdui 3, 4
-# CHECK-BE: td 31, 3, 4 # encoding: [0x7f,0xe3,0x20,0x88]
-# CHECK-LE: td 31, 3, 4 # encoding: [0x88,0x20,0xe3,0x7f]
+# CHECK-BE: tdu 3, 4 # encoding: [0x7f,0xe3,0x20,0x88]
+# CHECK-LE: tdu 3, 4 # encoding: [0x88,0x20,0xe3,0x7f]
tdu 3, 4
# CHECK-BE: trap # encoding: [0x7f,0xe0,0x00,0x08]
@@ -3289,23 +3289,23 @@
# CHECK-BE: rldimi. 2, 3, 55, 5 # encoding: [0x78,0x62,0xb9,0x4f]
# CHECK-LE: rldimi. 2, 3, 55, 5 # encoding: [0x4f,0xb9,0x62,0x78]
insrdi. 2, 3, 4, 5
-# CHECK-BE: rldicl 2, 3, 4, 0 # encoding: [0x78,0x62,0x20,0x00]
-# CHECK-LE: rldicl 2, 3, 4, 0 # encoding: [0x00,0x20,0x62,0x78]
+# CHECK-BE: rotldi 2, 3, 4 # encoding: [0x78,0x62,0x20,0x00]
+# CHECK-LE: rotldi 2, 3, 4 # encoding: [0x00,0x20,0x62,0x78]
rotldi 2, 3, 4
-# CHECK-BE: rldicl. 2, 3, 4, 0 # encoding: [0x78,0x62,0x20,0x01]
-# CHECK-LE: rldicl. 2, 3, 4, 0 # encoding: [0x01,0x20,0x62,0x78]
+# CHECK-BE: rotldi. 2, 3, 4 # encoding: [0x78,0x62,0x20,0x01]
+# CHECK-LE: rotldi. 2, 3, 4 # encoding: [0x01,0x20,0x62,0x78]
rotldi. 2, 3, 4
-# CHECK-BE: rldicl 2, 3, 60, 0 # encoding: [0x78,0x62,0xe0,0x02]
-# CHECK-LE: rldicl 2, 3, 60, 0 # encoding: [0x02,0xe0,0x62,0x78]
+# CHECK-BE: rotldi 2, 3, 60 # encoding: [0x78,0x62,0xe0,0x02]
+# CHECK-LE: rotldi 2, 3, 60 # encoding: [0x02,0xe0,0x62,0x78]
rotrdi 2, 3, 4
-# CHECK-BE: rldicl. 2, 3, 60, 0 # encoding: [0x78,0x62,0xe0,0x03]
-# CHECK-LE: rldicl. 2, 3, 60, 0 # encoding: [0x03,0xe0,0x62,0x78]
+# CHECK-BE: rotldi. 2, 3, 60 # encoding: [0x78,0x62,0xe0,0x03]
+# CHECK-LE: rotldi. 2, 3, 60 # encoding: [0x03,0xe0,0x62,0x78]
rotrdi. 2, 3, 4
-# CHECK-BE: rldcl 2, 3, 4, 0 # encoding: [0x78,0x62,0x20,0x10]
-# CHECK-LE: rldcl 2, 3, 4, 0 # encoding: [0x10,0x20,0x62,0x78]
+# CHECK-BE: rotld 2, 3, 4 # encoding: [0x78,0x62,0x20,0x10]
+# CHECK-LE: rotld 2, 3, 4 # encoding: [0x10,0x20,0x62,0x78]
rotld 2, 3, 4
-# CHECK-BE: rldcl. 2, 3, 4, 0 # encoding: [0x78,0x62,0x20,0x11]
-# CHECK-LE: rldcl. 2, 3, 4, 0 # encoding: [0x11,0x20,0x62,0x78]
+# CHECK-BE: rotld. 2, 3, 4 # encoding: [0x78,0x62,0x20,0x11]
+# CHECK-LE: rotld. 2, 3, 4 # encoding: [0x11,0x20,0x62,0x78]
rotld. 2, 3, 4
# CHECK-BE: sldi 2, 3, 4 # encoding: [0x78,0x62,0x26,0xe4]
# CHECK-LE: sldi 2, 3, 4 # encoding: [0xe4,0x26,0x62,0x78]
@@ -3319,11 +3319,11 @@
# CHECK-BE: rldicl. 2, 3, 60, 4 # encoding: [0x78,0x62,0xe1,0x03]
# CHECK-LE: rldicl. 2, 3, 60, 4 # encoding: [0x03,0xe1,0x62,0x78]
srdi. 2, 3, 4
-# CHECK-BE: rldicl 2, 3, 0, 4 # encoding: [0x78,0x62,0x01,0x00]
-# CHECK-LE: rldicl 2, 3, 0, 4 # encoding: [0x00,0x01,0x62,0x78]
+# CHECK-BE: clrldi 2, 3, 4 # encoding: [0x78,0x62,0x01,0x00]
+# CHECK-LE: clrldi 2, 3, 4 # encoding: [0x00,0x01,0x62,0x78]
clrldi 2, 3, 4
-# CHECK-BE: rldicl. 2, 3, 0, 4 # encoding: [0x78,0x62,0x01,0x01]
-# CHECK-LE: rldicl. 2, 3, 0, 4 # encoding: [0x01,0x01,0x62,0x78]
+# CHECK-BE: clrldi. 2, 3, 4 # encoding: [0x78,0x62,0x01,0x01]
+# CHECK-LE: clrldi. 2, 3, 4 # encoding: [0x01,0x01,0x62,0x78]
clrldi. 2, 3, 4
# CHECK-BE: rldicr 2, 3, 0, 59 # encoding: [0x78,0x62,0x06,0xe4]
# CHECK-LE: rldicr 2, 3, 0, 59 # encoding: [0xe4,0x06,0x62,0x78]
@@ -3362,23 +3362,23 @@
# CHECK-BE: rlwimi. 2, 3, 23, 5, 8 # encoding: [0x50,0x62,0xb9,0x51]
# CHECK-LE: rlwimi. 2, 3, 23, 5, 8 # encoding: [0x51,0xb9,0x62,0x50]
insrwi. 2, 3, 4, 5
-# CHECK-BE: rlwinm 2, 3, 4, 0, 31 # encoding: [0x54,0x62,0x20,0x3e]
-# CHECK-LE: rlwinm 2, 3, 4, 0, 31 # encoding: [0x3e,0x20,0x62,0x54]
+# CHECK-BE: rotlwi 2, 3, 4 # encoding: [0x54,0x62,0x20,0x3e]
+# CHECK-LE: rotlwi 2, 3, 4 # encoding: [0x3e,0x20,0x62,0x54]
rotlwi 2, 3, 4
-# CHECK-BE: rlwinm. 2, 3, 4, 0, 31 # encoding: [0x54,0x62,0x20,0x3f]
-# CHECK-LE: rlwinm. 2, 3, 4, 0, 31 # encoding: [0x3f,0x20,0x62,0x54]
+# CHECK-BE: rotlwi. 2, 3, 4 # encoding: [0x54,0x62,0x20,0x3f]
+# CHECK-LE: rotlwi. 2, 3, 4 # encoding: [0x3f,0x20,0x62,0x54]
rotlwi. 2, 3, 4
-# CHECK-BE: rlwinm 2, 3, 28, 0, 31 # encoding: [0x54,0x62,0xe0,0x3e]
-# CHECK-LE: rlwinm 2, 3, 28, 0, 31 # encoding: [0x3e,0xe0,0x62,0x54]
+# CHECK-BE: rotlwi 2, 3, 28 # encoding: [0x54,0x62,0xe0,0x3e]
+# CHECK-LE: rotlwi 2, 3, 28 # encoding: [0x3e,0xe0,0x62,0x54]
rotrwi 2, 3, 4
-# CHECK-BE: rlwinm. 2, 3, 28, 0, 31 # encoding: [0x54,0x62,0xe0,0x3f]
-# CHECK-LE: rlwinm. 2, 3, 28, 0, 31 # encoding: [0x3f,0xe0,0x62,0x54]
+# CHECK-BE: rotlwi. 2, 3, 28 # encoding: [0x54,0x62,0xe0,0x3f]
+# CHECK-LE: rotlwi. 2, 3, 28 # encoding: [0x3f,0xe0,0x62,0x54]
rotrwi. 2, 3, 4
-# CHECK-BE: rlwnm 2, 3, 4, 0, 31 # encoding: [0x5c,0x62,0x20,0x3e]
-# CHECK-LE: rlwnm 2, 3, 4, 0, 31 # encoding: [0x3e,0x20,0x62,0x5c]
+# CHECK-BE: rotlw 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3e]
+# CHECK-LE: rotlw 2, 3, 4 # encoding: [0x3e,0x20,0x62,0x5c]
rotlw 2, 3, 4
-# CHECK-BE: rlwnm. 2, 3, 4, 0, 31 # encoding: [0x5c,0x62,0x20,0x3f]
-# CHECK-LE: rlwnm. 2, 3, 4, 0, 31 # encoding: [0x3f,0x20,0x62,0x5c]
+# CHECK-BE: rotlw. 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3f]
+# CHECK-LE: rotlw. 2, 3, 4 # encoding: [0x3f,0x20,0x62,0x5c]
rotlw. 2, 3, 4
# CHECK-BE: slwi 2, 3, 4 # encoding: [0x54,0x62,0x20,0x36]
# CHECK-LE: slwi 2, 3, 4 # encoding: [0x36,0x20,0x62,0x54]
@@ -3392,11 +3392,11 @@
# CHECK-BE: rlwinm. 2, 3, 28, 4, 31 # encoding: [0x54,0x62,0xe1,0x3f]
# CHECK-LE: rlwinm. 2, 3, 28, 4, 31 # encoding: [0x3f,0xe1,0x62,0x54]
srwi. 2, 3, 4
-# CHECK-BE: rlwinm 2, 3, 0, 4, 31 # encoding: [0x54,0x62,0x01,0x3e]
-# CHECK-LE: rlwinm 2, 3, 0, 4, 31 # encoding: [0x3e,0x01,0x62,0x54]
+# CHECK-BE: clrlwi 2, 3, 4 # encoding: [0x54,0x62,0x01,0x3e]
+# CHECK-LE: clrlwi 2, 3, 4 # encoding: [0x3e,0x01,0x62,0x54]
clrlwi 2, 3, 4
-# CHECK-BE: rlwinm. 2, 3, 0, 4, 31 # encoding: [0x54,0x62,0x01,0x3f]
-# CHECK-LE: rlwinm. 2, 3, 0, 4, 31 # encoding: [0x3f,0x01,0x62,0x54]
+# CHECK-BE: clrlwi. 2, 3, 4 # encoding: [0x54,0x62,0x01,0x3f]
+# CHECK-LE: clrlwi. 2, 3, 4 # encoding: [0x3f,0x01,0x62,0x54]
clrlwi. 2, 3, 4
# CHECK-BE: rlwinm 2, 3, 0, 0, 27 # encoding: [0x54,0x62,0x00,0x36]
# CHECK-LE: rlwinm 2, 3, 0, 0, 27 # encoding: [0x36,0x00,0x62,0x54]
@@ -3413,35 +3413,35 @@
# Move to/from special purpose register mnemonics
-# CHECK-BE: mtspr 1, 2 # encoding: [0x7c,0x41,0x03,0xa6]
-# CHECK-LE: mtspr 1, 2 # encoding: [0xa6,0x03,0x41,0x7c]
+# CHECK-BE: mtxer 2 # encoding: [0x7c,0x41,0x03,0xa6]
+# CHECK-LE: mtxer 2 # encoding: [0xa6,0x03,0x41,0x7c]
mtxer 2
-# CHECK-BE: mfspr 2, 1 # encoding: [0x7c,0x41,0x02,0xa6]
-# CHECK-LE: mfspr 2, 1 # encoding: [0xa6,0x02,0x41,0x7c]
+# CHECK-BE: mfxer 2 # encoding: [0x7c,0x41,0x02,0xa6]
+# CHECK-LE: mfxer 2 # encoding: [0xa6,0x02,0x41,0x7c]
mfxer 2
-# CHECK-BE: mfspr 2, 4 # encoding: [0x7c,0x44,0x02,0xa6]
-# CHECK-LE: mfspr 2, 4 # encoding: [0xa6,0x02,0x44,0x7c]
+# CHECK-BE: mfrtcu 2 # encoding: [0x7c,0x44,0x02,0xa6]
+# CHECK-LE: mfrtcu 2 # encoding: [0xa6,0x02,0x44,0x7c]
mfrtcu 2
-# CHECK-BE: mfspr 2, 5 # encoding: [0x7c,0x45,0x02,0xa6]
-# CHECK-LE: mfspr 2, 5 # encoding: [0xa6,0x02,0x45,0x7c]
+# CHECK-BE: mfrtcl 2 # encoding: [0x7c,0x45,0x02,0xa6]
+# CHECK-LE: mfrtcl 2 # encoding: [0xa6,0x02,0x45,0x7c]
mfrtcl 2
-# CHECK-BE: mtspr 17, 2 # encoding: [0x7c,0x51,0x03,0xa6]
-# CHECK-LE: mtspr 17, 2 # encoding: [0xa6,0x03,0x51,0x7c]
+# CHECK-BE: mtdscr 2 # encoding: [0x7c,0x51,0x03,0xa6]
+# CHECK-LE: mtdscr 2 # encoding: [0xa6,0x03,0x51,0x7c]
mtdscr 2
-# CHECK-BE: mfspr 2, 17 # encoding: [0x7c,0x51,0x02,0xa6]
-# CHECK-LE: mfspr 2, 17 # encoding: [0xa6,0x02,0x51,0x7c]
+# CHECK-BE: mfdscr 2 # encoding: [0x7c,0x51,0x02,0xa6]
+# CHECK-LE: mfdscr 2 # encoding: [0xa6,0x02,0x51,0x7c]
mfdscr 2
-# CHECK-BE: mtspr 18, 2 # encoding: [0x7c,0x52,0x03,0xa6]
-# CHECK-LE: mtspr 18, 2 # encoding: [0xa6,0x03,0x52,0x7c]
+# CHECK-BE: mtdsisr 2 # encoding: [0x7c,0x52,0x03,0xa6]
+# CHECK-LE: mtdsisr 2 # encoding: [0xa6,0x03,0x52,0x7c]
mtdsisr 2
-# CHECK-BE: mfspr 2, 18 # encoding: [0x7c,0x52,0x02,0xa6]
-# CHECK-LE: mfspr 2, 18 # encoding: [0xa6,0x02,0x52,0x7c]
+# CHECK-BE: mfdsisr 2 # encoding: [0x7c,0x52,0x02,0xa6]
+# CHECK-LE: mfdsisr 2 # encoding: [0xa6,0x02,0x52,0x7c]
mfdsisr 2
-# CHECK-BE: mtspr 19, 2 # encoding: [0x7c,0x53,0x03,0xa6]
-# CHECK-LE: mtspr 19, 2 # encoding: [0xa6,0x03,0x53,0x7c]
+# CHECK-BE: mtdar 2 # encoding: [0x7c,0x53,0x03,0xa6]
+# CHECK-LE: mtdar 2 # encoding: [0xa6,0x03,0x53,0x7c]
mtdar 2
-# CHECK-BE: mfspr 2, 19 # encoding: [0x7c,0x53,0x02,0xa6]
-# CHECK-LE: mfspr 2, 19 # encoding: [0xa6,0x02,0x53,0x7c]
+# CHECK-BE: mfdar 2 # encoding: [0x7c,0x53,0x02,0xa6]
+# CHECK-LE: mfdar 2 # encoding: [0xa6,0x02,0x53,0x7c]
mfdar 2
# CHECK-BE: mtspr 22, 2 # encoding: [0x7c,0x56,0x03,0xa6]
# CHECK-LE: mtspr 22, 2 # encoding: [0xa6,0x03,0x56,0x7c]
@@ -3467,23 +3467,23 @@
# CHECK-BE: mfspr 2, 27 # encoding: [0x7c,0x5b,0x02,0xa6]
# CHECK-LE: mfspr 2, 27 # encoding: [0xa6,0x02,0x5b,0x7c]
mfsrr1 2
-# CHECK-BE: mtspr 28, 2 # encoding: [0x7c,0x5c,0x03,0xa6]
-# CHECK-LE: mtspr 28, 2 # encoding: [0xa6,0x03,0x5c,0x7c]
+# CHECK-BE: mtcfar 2 # encoding: [0x7c,0x5c,0x03,0xa6]
+# CHECK-LE: mtcfar 2 # encoding: [0xa6,0x03,0x5c,0x7c]
mtcfar 2
-# CHECK-BE: mfspr 2, 28 # encoding: [0x7c,0x5c,0x02,0xa6]
-# CHECK-LE: mfspr 2, 28 # encoding: [0xa6,0x02,0x5c,0x7c]
+# CHECK-BE: mfcfar 2 # encoding: [0x7c,0x5c,0x02,0xa6]
+# CHECK-LE: mfcfar 2 # encoding: [0xa6,0x02,0x5c,0x7c]
mfcfar 2
-# CHECK-BE: mtspr 29, 2 # encoding: [0x7c,0x5d,0x03,0xa6]
-# CHECK-LE: mtspr 29, 2 # encoding: [0xa6,0x03,0x5d,0x7c]
+# CHECK-BE: mtamr 2 # encoding: [0x7c,0x5d,0x03,0xa6]
+# CHECK-LE: mtamr 2 # encoding: [0xa6,0x03,0x5d,0x7c]
mtamr 2
-# CHECK-BE: mfspr 2, 29 # encoding: [0x7c,0x5d,0x02,0xa6]
-# CHECK-LE: mfspr 2, 29 # encoding: [0xa6,0x02,0x5d,0x7c]
+# CHECK-BE: mfamr 2 # encoding: [0x7c,0x5d,0x02,0xa6]
+# CHECK-LE: mfamr 2 # encoding: [0xa6,0x02,0x5d,0x7c]
mfamr 2
-# CHECK-BE: mtspr 48, 2 # encoding: [0x7c,0x50,0x0b,0xa6]
-# CHECK-LE: mtspr 48, 2 # encoding: [0xa6,0x0b,0x50,0x7c]
+# CHECK-BE: mtpid 2 # encoding: [0x7c,0x50,0x0b,0xa6]
+# CHECK-LE: mtpid 2 # encoding: [0xa6,0x0b,0x50,0x7c]
mtpid 2
-# CHECK-BE: mfspr 2, 48 # encoding: [0x7c,0x50,0x0a,0xa6]
-# CHECK-LE: mfspr 2, 48 # encoding: [0xa6,0x0a,0x50,0x7c]
+# CHECK-BE: mfpid 2 # encoding: [0x7c,0x50,0x0a,0xa6]
+# CHECK-LE: mfpid 2 # encoding: [0xa6,0x0a,0x50,0x7c]
mfpid 2
# CHECK-BE: mtlr 2 # encoding: [0x7c,0x48,0x03,0xa6]
# CHECK-LE: mtlr 2 # encoding: [0xa6,0x03,0x48,0x7c]
@@ -3503,8 +3503,8 @@
# CHECK-BE: nop # encoding: [0x60,0x00,0x00,0x00]
# CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x60]
nop
-# CHECK-BE: xori 0, 0, 0 # encoding: [0x68,0x00,0x00,0x00]
-# CHECK-LE: xori 0, 0, 0 # encoding: [0x00,0x00,0x00,0x68]
+# CHECK-BE: xnop # encoding: [0x68,0x00,0x00,0x00]
+# CHECK-LE: xnop # encoding: [0x00,0x00,0x00,0x68]
xnop
# CHECK-BE: li 2, 128 # encoding: [0x38,0x40,0x00,0x80]
# CHECK-LE: li 2, 128 # encoding: [0x80,0x00,0x40,0x38]
@@ -3518,17 +3518,17 @@
# CHECK-BE: mr 2, 3 # encoding: [0x7c,0x62,0x1b,0x78]
# CHECK-LE: mr 2, 3 # encoding: [0x78,0x1b,0x62,0x7c]
mr 2, 3
-# CHECK-BE: or. 2, 3, 3 # encoding: [0x7c,0x62,0x1b,0x79]
-# CHECK-LE: or. 2, 3, 3 # encoding: [0x79,0x1b,0x62,0x7c]
+# CHECK-BE: mr. 2, 3 # encoding: [0x7c,0x62,0x1b,0x79]
+# CHECK-LE: mr. 2, 3 # encoding: [0x79,0x1b,0x62,0x7c]
mr. 2, 3
-# CHECK-BE: nor 2, 3, 3 # encoding: [0x7c,0x62,0x18,0xf8]
-# CHECK-LE: nor 2, 3, 3 # encoding: [0xf8,0x18,0x62,0x7c]
+# CHECK-BE: not 2, 3 # encoding: [0x7c,0x62,0x18,0xf8]
+# CHECK-LE: not 2, 3 # encoding: [0xf8,0x18,0x62,0x7c]
not 2, 3
-# CHECK-BE: nor. 2, 3, 3 # encoding: [0x7c,0x62,0x18,0xf9]
-# CHECK-LE: nor. 2, 3, 3 # encoding: [0xf9,0x18,0x62,0x7c]
+# CHECK-BE: not. 2, 3 # encoding: [0x7c,0x62,0x18,0xf9]
+# CHECK-LE: not. 2, 3 # encoding: [0xf9,0x18,0x62,0x7c]
not. 2, 3
-# CHECK-BE: mtcrf 255, 2 # encoding: [0x7c,0x4f,0xf1,0x20]
-# CHECK-LE: mtcrf 255, 2 # encoding: [0x20,0xf1,0x4f,0x7c]
+# CHECK-BE: mtcr 2 # encoding: [0x7c,0x4f,0xf1,0x20]
+# CHECK-LE: mtcr 2 # encoding: [0x20,0xf1,0x4f,0x7c]
mtcr 2
# CHECK-BE: mfspr 4, 272 # encoding: [0x7c,0x90,0x42,0xa6]
@@ -3623,12 +3623,12 @@
# CHECK-LE: stswi 8, 6, 7 # encoding: [0xaa,0x3d,0x06,0x7d]
stswi %r8, %r6, 7
-# CHECK-BE: rfid # encoding: [0x4c,0x00,0x00,0x24]
-# CHECK-LE: rfid # encoding: [0x24,0x00,0x00,0x4c]
+# CHECK-BE: rfid # encoding: [0x4c,0x00,0x00,0x24]
+# CHECK-LE: rfid # encoding: [0x24,0x00,0x00,0x4c]
rfid
-# CHECK-BE: mfspr 2, 280 # encoding: [0x7c,0x58,0x42,0xa6]
-# CHECK-LE: mfspr 2, 280 # encoding: [0xa6,0x42,0x58,0x7c]
+# CHECK-BE: mfasr 2 # encoding: [0x7c,0x58,0x42,0xa6]
+# CHECK-LE: mfasr 2 # encoding: [0xa6,0x42,0x58,0x7c]
mfasr 2
# CHECK-BE: mtspr 280, 2 # encoding: [0x7c,0x58,0x43,0xa6]
# CHECK-LE: mtspr 280, 2 # encoding: [0xa6,0x43,0x58,0x7c]
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-fp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-fp.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-fp.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-fp.s Thu Apr 23 13:30:38 2015
@@ -371,11 +371,11 @@
# CHECK-BE: mtfsfi. 5, 2, 1 # encoding: [0xfe,0x81,0x21,0x0d]
# CHECK-LE: mtfsfi. 5, 2, 1 # encoding: [0x0d,0x21,0x81,0xfe]
mtfsfi. 5, 2, 1
-# CHECK-BE: mtfsfi 6, 2, 0 # encoding: [0xff,0x00,0x21,0x0c]
-# CHECK-LE: mtfsfi 6, 2, 0 # encoding: [0x0c,0x21,0x00,0xff]
+# CHECK-BE: mtfsfi 6, 2 # encoding: [0xff,0x00,0x21,0x0c]
+# CHECK-LE: mtfsfi 6, 2 # encoding: [0x0c,0x21,0x00,0xff]
mtfsfi 6, 2
-# CHECK-BE: mtfsfi. 6, 2, 0 # encoding: [0xff,0x00,0x21,0x0d]
-# CHECK-LE: mtfsfi. 6, 2, 0 # encoding: [0x0d,0x21,0x00,0xff]
+# CHECK-BE: mtfsfi. 6, 2 # encoding: [0xff,0x00,0x21,0x0d]
+# CHECK-LE: mtfsfi. 6, 2 # encoding: [0x0d,0x21,0x00,0xff]
mtfsfi. 6, 2
# CHECK-BE: mtfsf 127, 8, 1, 1 # encoding: [0xfe,0xff,0x45,0x8e]
# CHECK-LE: mtfsf 127, 8, 1, 1 # encoding: [0x8e,0x45,0xff,0xfe]
@@ -383,11 +383,11 @@
# CHECK-BE: mtfsf. 125, 8, 1, 1 # encoding: [0xfe,0xfb,0x45,0x8f]
# CHECK-LE: mtfsf. 125, 8, 1, 1 # encoding: [0x8f,0x45,0xfb,0xfe]
mtfsf. 125, 8, 1, 1
-# CHECK-BE: mtfsf 127, 6, 0, 0 # encoding: [0xfc,0xfe,0x35,0x8e]
-# CHECK-LE: mtfsf 127, 6, 0, 0 # encoding: [0x8e,0x35,0xfe,0xfc]
+# CHECK-BE: mtfsf 127, 6 # encoding: [0xfc,0xfe,0x35,0x8e]
+# CHECK-LE: mtfsf 127, 6 # encoding: [0x8e,0x35,0xfe,0xfc]
mtfsf 127, 6
-# CHECK-BE: mtfsf. 125, 6, 0, 0 # encoding: [0xfc,0xfa,0x35,0x8f]
-# CHECK-LE: mtfsf. 125, 6, 0, 0 # encoding: [0x8f,0x35,0xfa,0xfc]
+# CHECK-BE: mtfsf. 125, 6 # encoding: [0xfc,0xfa,0x35,0x8f]
+# CHECK-LE: mtfsf. 125, 6 # encoding: [0x8f,0x35,0xfa,0xfc]
mtfsf. 125, 6
# CHECK-BE: mtfsb0 31 # encoding: [0xff,0xe0,0x00,0x8c]
# CHECK-LE: mtfsb0 31 # encoding: [0x8c,0x00,0xe0,0xff]
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding.s Thu Apr 23 13:30:38 2015
@@ -27,23 +27,23 @@
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
bla target
-# CHECK-BE: bc 4, 10, target # encoding: [0x40,0x8a,A,0bAAAAAA00]
-# CHECK-LE: bc 4, 10, target # encoding: [0bAAAAAA00,A,0x8a,0x40]
+# CHECK-BE: bf 10, target # encoding: [0x40,0x8a,A,0bAAAAAA00]
+# CHECK-LE: bf 10, target # encoding: [0bAAAAAA00,A,0x8a,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bc 4, 10, target
-# CHECK-BE: bca 4, 10, target # encoding: [0x40,0x8a,A,0bAAAAAA10]
-# CHECK-LE: bca 4, 10, target # encoding: [0bAAAAAA10,A,0x8a,0x40]
+# CHECK-BE: bfa 10, target # encoding: [0x40,0x8a,A,0bAAAAAA10]
+# CHECK-LE: bfa 10, target # encoding: [0bAAAAAA10,A,0x8a,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bca 4, 10, target
-# CHECK-BE: bcl 4, 10, target # encoding: [0x40,0x8a,A,0bAAAAAA01]
-# CHECK-LE: bcl 4, 10, target # encoding: [0bAAAAAA01,A,0x8a,0x40]
+# CHECK-BE: bfl 10, target # encoding: [0x40,0x8a,A,0bAAAAAA01]
+# CHECK-LE: bfl 10, target # encoding: [0bAAAAAA01,A,0x8a,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
bcl 4, 10, target
-# CHECK-BE: bcla 4, 10, target # encoding: [0x40,0x8a,A,0bAAAAAA11]
-# CHECK-LE: bcla 4, 10, target # encoding: [0bAAAAAA11,A,0x8a,0x40]
+# CHECK-BE: bfla 10, target # encoding: [0x40,0x8a,A,0bAAAAAA11]
+# CHECK-LE: bfla 10, target # encoding: [0bAAAAAA11,A,0x8a,0x40]
# CHECK-BE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
# CHECK-LE-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
bcla 4, 10, target
@@ -51,26 +51,26 @@
# CHECK-BE: bclr 4, 10, 3 # encoding: [0x4c,0x8a,0x18,0x20]
# CHECK-LE: bclr 4, 10, 3 # encoding: [0x20,0x18,0x8a,0x4c]
bclr 4, 10, 3
-# CHECK-BE: bclr 4, 10, 0 # encoding: [0x4c,0x8a,0x00,0x20]
-# CHECK-LE: bclr 4, 10, 0 # encoding: [0x20,0x00,0x8a,0x4c]
+# CHECK-BE: bclr 4, 10 # encoding: [0x4c,0x8a,0x00,0x20]
+# CHECK-LE: bclr 4, 10 # encoding: [0x20,0x00,0x8a,0x4c]
bclr 4, 10
# CHECK-BE: bclrl 4, 10, 3 # encoding: [0x4c,0x8a,0x18,0x21]
# CHECK-LE: bclrl 4, 10, 3 # encoding: [0x21,0x18,0x8a,0x4c]
bclrl 4, 10, 3
-# CHECK-BE: bclrl 4, 10, 0 # encoding: [0x4c,0x8a,0x00,0x21]
-# CHECK-LE: bclrl 4, 10, 0 # encoding: [0x21,0x00,0x8a,0x4c]
+# CHECK-BE: bclrl 4, 10 # encoding: [0x4c,0x8a,0x00,0x21]
+# CHECK-LE: bclrl 4, 10 # encoding: [0x21,0x00,0x8a,0x4c]
bclrl 4, 10
# CHECK-BE: bcctr 4, 10, 3 # encoding: [0x4c,0x8a,0x1c,0x20]
# CHECK-LE: bcctr 4, 10, 3 # encoding: [0x20,0x1c,0x8a,0x4c]
bcctr 4, 10, 3
-# CHECK-BE: bcctr 4, 10, 0 # encoding: [0x4c,0x8a,0x04,0x20]
-# CHECK-LE: bcctr 4, 10, 0 # encoding: [0x20,0x04,0x8a,0x4c]
+# CHECK-BE: bcctr 4, 10 # encoding: [0x4c,0x8a,0x04,0x20]
+# CHECK-LE: bcctr 4, 10 # encoding: [0x20,0x04,0x8a,0x4c]
bcctr 4, 10
# CHECK-BE: bcctrl 4, 10, 3 # encoding: [0x4c,0x8a,0x1c,0x21]
# CHECK-LE: bcctrl 4, 10, 3 # encoding: [0x21,0x1c,0x8a,0x4c]
bcctrl 4, 10, 3
-# CHECK-BE: bcctrl 4, 10, 0 # encoding: [0x4c,0x8a,0x04,0x21]
-# CHECK-LE: bcctrl 4, 10, 0 # encoding: [0x21,0x04,0x8a,0x4c]
+# CHECK-BE: bcctrl 4, 10 # encoding: [0x4c,0x8a,0x04,0x21]
+# CHECK-LE: bcctrl 4, 10 # encoding: [0x21,0x04,0x8a,0x4c]
bcctrl 4, 10
# Condition register instructions
@@ -108,8 +108,8 @@
# CHECK-BE: sc 1 # encoding: [0x44,0x00,0x00,0x22]
# CHECK-LE: sc 1 # encoding: [0x22,0x00,0x00,0x44]
sc 1
-# CHECK-BE: sc 0 # encoding: [0x44,0x00,0x00,0x02]
-# CHECK-LE: sc 0 # encoding: [0x02,0x00,0x00,0x44]
+# CHECK-BE: sc # encoding: [0x44,0x00,0x00,0x02]
+# CHECK-LE: sc # encoding: [0x02,0x00,0x00,0x44]
sc
# Fixed-point facility
@@ -521,17 +521,17 @@
# Fixed-point trap instructions
-# CHECK-BE: twi 2, 3, 4 # encoding: [0x0c,0x43,0x00,0x04]
-# CHECK-LE: twi 2, 3, 4 # encoding: [0x04,0x00,0x43,0x0c]
+# CHECK-BE: twllti 3, 4 # encoding: [0x0c,0x43,0x00,0x04]
+# CHECK-LE: twllti 3, 4 # encoding: [0x04,0x00,0x43,0x0c]
twi 2, 3, 4
-# CHECK-BE: tw 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x08]
-# CHECK-LE: tw 2, 3, 4 # encoding: [0x08,0x20,0x43,0x7c]
+# CHECK-BE: twllt 3, 4 # encoding: [0x7c,0x43,0x20,0x08]
+# CHECK-LE: twllt 3, 4 # encoding: [0x08,0x20,0x43,0x7c]
tw 2, 3, 4
-# CHECK-BE: tdi 2, 3, 4 # encoding: [0x08,0x43,0x00,0x04]
-# CHECK-LE: tdi 2, 3, 4 # encoding: [0x04,0x00,0x43,0x08]
+# CHECK-BE: tdllti 3, 4 # encoding: [0x08,0x43,0x00,0x04]
+# CHECK-LE: tdllti 3, 4 # encoding: [0x04,0x00,0x43,0x08]
tdi 2, 3, 4
-# CHECK-BE: td 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x88]
-# CHECK-LE: td 2, 3, 4 # encoding: [0x88,0x20,0x43,0x7c]
+# CHECK-BE: tdllt 3, 4 # encoding: [0x7c,0x43,0x20,0x88]
+# CHECK-LE: tdllt 3, 4 # encoding: [0x88,0x20,0x43,0x7c]
td 2, 3, 4
# Fixed-point select
@@ -622,17 +622,17 @@
# CHECK-LE: extsh. 2, 3 # encoding: [0x35,0x07,0x62,0x7c]
extsh. 2, 3
-# CHECK-BE: cntlzw 2, 3 # encoding: [0x7c,0x62,0x00,0x34]
-# CHECK-LE: cntlzw 2, 3 # encoding: [0x34,0x00,0x62,0x7c]
+# CHECK-BE: cntlz 2, 3 # encoding: [0x7c,0x62,0x00,0x34]
+# CHECK-LE: cntlz 2, 3 # encoding: [0x34,0x00,0x62,0x7c]
cntlzw 2, 3
-# CHECK-BE: cntlzw. 2, 3 # encoding: [0x7c,0x62,0x00,0x35]
-# CHECK-LE: cntlzw. 2, 3 # encoding: [0x35,0x00,0x62,0x7c]
+# CHECK-BE: cntlz. 2, 3 # encoding: [0x7c,0x62,0x00,0x35]
+# CHECK-LE: cntlz. 2, 3 # encoding: [0x35,0x00,0x62,0x7c]
cntlzw. 2, 3
-# CHECK-BE: cntlzw 2, 3 # encoding: [0x7c,0x62,0x00,0x34]
-# CHECK-LE: cntlzw 2, 3 # encoding: [0x34,0x00,0x62,0x7c]
+# CHECK-BE: cntlz 2, 3 # encoding: [0x7c,0x62,0x00,0x34]
+# CHECK-LE: cntlz 2, 3 # encoding: [0x34,0x00,0x62,0x7c]
cntlz 2, 3
-# CHECK-BE: cntlzw. 2, 3 # encoding: [0x7c,0x62,0x00,0x35]
-# CHECK-LE: cntlzw. 2, 3 # encoding: [0x35,0x00,0x62,0x7c]
+# CHECK-BE: cntlz. 2, 3 # encoding: [0x7c,0x62,0x00,0x35]
+# CHECK-LE: cntlz. 2, 3 # encoding: [0x35,0x00,0x62,0x7c]
cntlz. 2, 3
cmpb 7, 21, 4
# CHECK-BE: cmpb 7, 21, 4 # encoding: [0x7e,0xa7,0x23,0xf8]
Modified: llvm/trunk/test/MC/PowerPC/qpx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/qpx.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/qpx.s (original)
+++ llvm/trunk/test/MC/PowerPC/qpx.s Thu Apr 23 13:30:38 2015
@@ -8,9 +8,9 @@
qvfadd 3, 4, 5
# CHECK: qvfadds 3, 4, 5 # encoding: [0x00,0x64,0x28,0x2a]
qvfadds 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 4 # encoding: [0x10,0x64,0x2a,0x08]
+# CHECK: qvfandc 3, 4, 5 # encoding: [0x10,0x64,0x2a,0x08]
qvfandc 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 1 # encoding: [0x10,0x64,0x28,0x88]
+# CHECK: qvfand 3, 4, 5 # encoding: [0x10,0x64,0x28,0x88]
qvfand 3, 4, 5
# CHECK: qvfcfid 3, 5 # encoding: [0x10,0x60,0x2e,0x9c]
qvfcfid 3, 5
@@ -20,11 +20,11 @@
qvfcfidu 3, 5
# CHECK: qvfcfidus 3, 5 # encoding: [0x00,0x60,0x2f,0x9c]
qvfcfidus 3, 5
-# CHECK: qvflogical 3, 3, 3, 0 # encoding: [0x10,0x63,0x18,0x08]
+# CHECK: qvfclr 3 # encoding: [0x10,0x63,0x18,0x08]
qvfclr 3
# CHECK: qvfcpsgn 3, 4, 5 # encoding: [0x10,0x64,0x28,0x10]
qvfcpsgn 3, 4, 5
-# CHECK: qvflogical 3, 4, 4, 5 # encoding: [0x10,0x64,0x22,0x88]
+# CHECK: qvfctfb 3, 4 # encoding: [0x10,0x64,0x22,0x88]
qvfctfb 3, 4
# CHECK: qvfctid 3, 5 # encoding: [0x10,0x60,0x2e,0x5c]
qvfctid 3, 5
@@ -42,7 +42,7 @@
qvfctiwuz 3, 5
# CHECK: qvfctiwz 3, 5 # encoding: [0x10,0x60,0x28,0x1e]
qvfctiwz 3, 5
-# CHECK: qvflogical 3, 4, 5, 9 # encoding: [0x10,0x64,0x2c,0x88]
+# CHECK: qvfequ 3, 4, 5 # encoding: [0x10,0x64,0x2c,0x88]
qvfequ 3, 4, 5
# CHECK: qvflogical 3, 4, 5, 12 # encoding: [0x10,0x64,0x2e,0x08]
qvflogical 3, 4, 5, 12
@@ -62,7 +62,7 @@
qvfmuls 3, 4, 6
# CHECK: qvfnabs 3, 5 # encoding: [0x10,0x60,0x29,0x10]
qvfnabs 3, 5
-# CHECK: qvflogical 3, 4, 5, 14 # encoding: [0x10,0x64,0x2f,0x08]
+# CHECK: qvfnand 3, 4, 5 # encoding: [0x10,0x64,0x2f,0x08]
qvfnand 3, 4, 5
# CHECK: qvfneg 3, 5 # encoding: [0x10,0x60,0x28,0x50]
qvfneg 3, 5
@@ -74,13 +74,13 @@
qvfnmsub 3, 4, 6, 5
# CHECK: qvfnmsubs 3, 4, 6, 5 # encoding: [0x00,0x64,0x29,0xbc]
qvfnmsubs 3, 4, 6, 5
-# CHECK: qvflogical 3, 4, 5, 8 # encoding: [0x10,0x64,0x2c,0x08]
+# CHECK: qvfnor 3, 4, 5 # encoding: [0x10,0x64,0x2c,0x08]
qvfnor 3, 4, 5
-# CHECK: qvflogical 3, 4, 4, 10 # encoding: [0x10,0x64,0x25,0x08]
+# CHECK: qvfnot 3, 4 # encoding: [0x10,0x64,0x25,0x08]
qvfnot 3, 4
-# CHECK: qvflogical 3, 4, 5, 13 # encoding: [0x10,0x64,0x2e,0x88]
+# CHECK: qvforc 3, 4, 5 # encoding: [0x10,0x64,0x2e,0x88]
qvforc 3, 4, 5
-# CHECK: qvflogical 3, 4, 5, 7 # encoding: [0x10,0x64,0x2b,0x88]
+# CHECK: qvfor 3, 4, 5 # encoding: [0x10,0x64,0x2b,0x88]
qvfor 3, 4, 5
# CHECK: qvfperm 3, 4, 5, 6 # encoding: [0x10,0x64,0x29,0x8c]
qvfperm 3, 4, 5, 6
@@ -104,7 +104,7 @@
qvfrsqrtes 3, 5
# CHECK: qvfsel 3, 4, 6, 5 # encoding: [0x10,0x64,0x29,0xae]
qvfsel 3, 4, 6, 5
-# CHECK: qvflogical 3, 3, 3, 15 # encoding: [0x10,0x63,0x1f,0x88]
+# CHECK: qvfset 3 # encoding: [0x10,0x63,0x1f,0x88]
qvfset 3
# CHECK: qvfsub 3, 4, 5 # encoding: [0x10,0x64,0x28,0x28]
qvfsub 3, 4, 5
@@ -118,7 +118,7 @@
qvfxmul 3, 4, 6
# CHECK: qvfxmuls 3, 4, 6 # encoding: [0x00,0x64,0x01,0xa2]
qvfxmuls 3, 4, 6
-# CHECK: qvflogical 3, 4, 5, 6 # encoding: [0x10,0x64,0x2b,0x08]
+# CHECK: qvfxor 3, 4, 5 # encoding: [0x10,0x64,0x2b,0x08]
qvfxor 3, 4, 5
# CHECK: qvfxxcpnmadd 3, 4, 6, 5 # encoding: [0x10,0x64,0x29,0x86]
qvfxxcpnmadd 3, 4, 6, 5
Modified: llvm/trunk/test/MC/PowerPC/vsx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/vsx.s?rev=235616&r1=235615&r2=235616&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/vsx.s (original)
+++ llvm/trunk/test/MC/PowerPC/vsx.s Thu Apr 23 13:30:38 2015
@@ -274,11 +274,11 @@
# CHECK-BE: xvminsp 7, 63, 27 # encoding: [0xf0,0xff,0xde,0x44]
# CHECK-LE: xvminsp 7, 63, 27 # encoding: [0x44,0xde,0xff,0xf0]
xvminsp 7, 63, 27
-# CHECK-BE: xvcpsgndp 7, 63, 63 # encoding: [0xf0,0xff,0xff,0x86]
-# CHECK-LE: xvcpsgndp 7, 63, 63 # encoding: [0x86,0xff,0xff,0xf0]
+# CHECK-BE: xvmovdp 7, 63 # encoding: [0xf0,0xff,0xff,0x86]
+# CHECK-LE: xvmovdp 7, 63 # encoding: [0x86,0xff,0xff,0xf0]
xvmovdp 7, 63
-# CHECK-BE: xvcpsgnsp 7, 63, 63 # encoding: [0xf0,0xff,0xfe,0x86]
-# CHECK-LE: xvcpsgnsp 7, 63, 63 # encoding: [0x86,0xfe,0xff,0xf0]
+# CHECK-BE: xvmovsp 7, 63 # encoding: [0xf0,0xff,0xfe,0x86]
+# CHECK-LE: xvmovsp 7, 63 # encoding: [0x86,0xfe,0xff,0xf0]
xvmovsp 7, 63
# CHECK-BE: xvmsubadp 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x8c]
# CHECK-LE: xvmsubadp 7, 63, 27 # encoding: [0x8c,0xdb,0xff,0xf0]
@@ -424,14 +424,14 @@
# CHECK-BE: xxlxor 7, 63, 27 # encoding: [0xf0,0xff,0xdc,0xd4]
# CHECK-LE: xxlxor 7, 63, 27 # encoding: [0xd4,0xdc,0xff,0xf0]
xxlxor 7, 63, 27
-# CHECK-BE: xxpermdi 7, 63, 27, 0 # encoding: [0xf0,0xff,0xd8,0x54]
-# CHECK-LE: xxpermdi 7, 63, 27, 0 # encoding: [0x54,0xd8,0xff,0xf0]
+# CHECK-BE: xxmrghd 7, 63, 27 # encoding: [0xf0,0xff,0xd8,0x54]
+# CHECK-LE: xxmrghd 7, 63, 27 # encoding: [0x54,0xd8,0xff,0xf0]
xxmrghd 7, 63, 27
# CHECK-BE: xxmrghw 7, 63, 27 # encoding: [0xf0,0xff,0xd8,0x94]
# CHECK-LE: xxmrghw 7, 63, 27 # encoding: [0x94,0xd8,0xff,0xf0]
xxmrghw 7, 63, 27
-# CHECK-BE: xxpermdi 7, 63, 27, 3 # encoding: [0xf0,0xff,0xdb,0x54]
-# CHECK-LE: xxpermdi 7, 63, 27, 3 # encoding: [0x54,0xdb,0xff,0xf0]
+# CHECK-BE: xxmrgld 7, 63, 27 # encoding: [0xf0,0xff,0xdb,0x54]
+# CHECK-LE: xxmrgld 7, 63, 27 # encoding: [0x54,0xdb,0xff,0xf0]
xxmrgld 7, 63, 27
# CHECK-BE: xxmrglw 7, 63, 27 # encoding: [0xf0,0xff,0xd9,0x94]
# CHECK-LE: xxmrglw 7, 63, 27 # encoding: [0x94,0xd9,0xff,0xf0]
@@ -445,14 +445,14 @@
# CHECK-BE: xxsldwi 7, 63, 27, 1 # encoding: [0xf0,0xff,0xd9,0x14]
# CHECK-LE: xxsldwi 7, 63, 27, 1 # encoding: [0x14,0xd9,0xff,0xf0]
xxsldwi 7, 63, 27, 1
-# CHECK-BE: xxpermdi 7, 63, 63, 3 # encoding: [0xf0,0xff,0xfb,0x56]
-# CHECK-LE: xxpermdi 7, 63, 63, 3 # encoding: [0x56,0xfb,0xff,0xf0]
+# CHECK-BE: xxspltd 7, 63, 1 # encoding: [0xf0,0xff,0xfb,0x56]
+# CHECK-LE: xxspltd 7, 63, 1 # encoding: [0x56,0xfb,0xff,0xf0]
xxspltd 7, 63, 1
# CHECK-BE: xxspltw 7, 27, 3 # encoding: [0xf0,0xe3,0xda,0x90]
# CHECK-LE: xxspltw 7, 27, 3 # encoding: [0x90,0xda,0xe3,0xf0]
xxspltw 7, 27, 3
-# CHECK-BE: xxpermdi 7, 63, 63, 2 # encoding: [0xf0,0xff,0xfa,0x56]
-# CHECK-LE: xxpermdi 7, 63, 63, 2 # encoding: [0x56,0xfa,0xff,0xf0]
+# CHECK-BE: xxswapd 7, 63 # encoding: [0xf0,0xff,0xfa,0x56]
+# CHECK-LE: xxswapd 7, 63 # encoding: [0x56,0xfa,0xff,0xf0]
xxswapd 7, 63
# Move to/from VSR
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