[PATCH] [ARM] Add Thumb-2 code size optimization (wide CMP to narrow ADD)m

[John Brawn]

It should be safe to do this transformation even if flags other than the
Z flag are used: CMP #-imm behaves identically to CMN #imm, and ADDS #imm
sets the PSR flags in the same manner as CMN #imm.

I haven't checked that it actually works OK though.

John

> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> bounces at cs.uiuc.edu] On Behalf Of Tilmann Scheller
> Sent: 23 April 2015 11:19
> To: llvm-commits at cs.uiuc.edu
> Subject: [PATCH] [ARM] Add Thumb-2 code size optimization (wide CMP to
> narrow ADD)m
>
> Hi,
>
> attached is a patch for a small Thumb-2 code size optimization I
> implemented a while ago.
>
> Tested with r235577.
>
> Feedback welcome :)
>
> Regards,
>
> Tilmann
>
>
>
> [ARM] Add Thumb-2 code size optimization (wide CMP to narrow ADD)
>
> For wide CMP instructions which are comparing against a small negative
> immediate in the range of -255 to -1 it is possible to replace them
> with
> narrow ADD instructions instead.
>
> Apart from the constraints on the immediate value there are additional
> conditions which need to be met for this transformation to be safe:
>    - The CMP register operand needs to be in a low register and there
> can't be subsequent uses of the register as ADD will clobber it
>    - Any uses of the CPSR def by the CMP instruction are restricted to
> the Z flag only
>
> This code size optimization opportunity was spotted in an inner loop of
> 175.vpr.
>
> Example:
>
>      define i32 @foo(i32 %a) nounwind {
>      entry:
>        %cmp = icmp eq i32 %a, -1
>        br i1 %cmp, label %if.then, label %if.else
>
>      if.then:
>        ret i32 42
>
>      if.else:
>        ret i32 13
>      }
>
>      This translates into the following code sequence:
>
>      movs    r1, #13                 @ encoding: [0x0d,0x21]
>      cmp.w   r0, #-1                 @ encoding: [0xb0,0xf1,0xff,0x3f]
>      it      eq                      @ encoding: [0x08,0xbf]
>      moveq   r1, #42                 @ encoding: [0x2a,0x21]
>      mov     r0, r1                  @ encoding: [0x08,0x46]
>      bx      lr                      @ encoding: [0x70,0x47]
>
>      With the code size optimization applied we get the following code
> sequence:
>
>      movs    r1, #13                 @ encoding: [0x0d,0x21]
>      adds    r0, #1                  @ encoding: [0x01,0x30]
>      it      eq                      @ encoding: [0x08,0xbf]
>      moveq   r1, #42                 @ encoding: [0x2a,0x21]
>      mov     r0, r1                  @ encoding: [0x08,0x46]
>      bx      lr                      @ encoding: [0x70,0x47]

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