[PATCH] [AArch64] Handle vec4 sitofp and uitofp for half

Wed Apr 22 14:37:45 PDT 2015

================
Comment at: test/CodeGen/AArch64/fp16-v8-instructions.ll:340-341
@@ +339,4 @@
+; CHECK-LABEL: uitofp_i32:
+; CHECK: ucvtf [[OP1:v[0-9]+\.4s]], v0.4s
+; CHECK: fcvtn v0.4h, [[OP1]]
+  %1 = uitofp <8 x i32> %a to <8 x half>
----------------
ab wrote:
> What about the higher lanes? (another rant: that's why I like over-using -NEXT, it avoids this kind of question entirely).
Good catch.  I'll fix this.

FileCheck should support CHECK-DAG-STRICT, or something similar, and reject any line without an entry in the CHECK-DAG-STRICT block.  Then we no longer have to compromise between CHECK-NEXT and hardening against schedule variations.

http://reviews.llvm.org/D9166

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