[PATCH] [x86] allow 64-bit extracted vector element integer stores on a 32-bit system
Ahmed Bougacha
ahmed.bougacha at gmail.com
Tue Apr 21 09:37:41 PDT 2015
A couple nits, but LGTM, thanks!
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:22939-22944
@@ +22938,8 @@
+ St->getOperand(1).getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
+ SDValue OldExtract = St->getOperand(1);
+ SDValue ExtOp0 = OldExtract.getOperand(0);
+ unsigned VecSize = ExtOp0.getValueSizeInBits();
+ MVT VecVT = MVT::getVectorVT(MVT::f64, VecSize / 64);
+ SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtOp0);
+ SDValue NewExtract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64,
+ BitCast, OldExtract.getOperand(1));
----------------
Very subjective, but I feel like there's a couple variables too many. You decide.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:22946-22950
@@ +22945,7 @@
+ BitCast, OldExtract.getOperand(1));
+ return DAG.getStore(St->getChain(), dl, NewExtract, St->getBasePtr(),
+ St->getPointerInfo(),
+ St->isVolatile(),
+ St->isNonTemporal(),
+ St->getAlignment());
+ }
----------------
Reflow formatting?
================
Comment at: test/CodeGen/X86/i64-mem-copy.ll:27-28
@@ -26,1 +26,4 @@
+; Verify that a 64-bit chunk extracted from a vector is stored with a movq
+; regardless of whether the system is 64-bit.
+
----------------
Perhaps also test a lane index != 0?
http://reviews.llvm.org/D9134
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