[PATCH] X86: Match for X86ISD nodes in LowerBUILD_VECTOR instead of BUILD_VECTORCombine

[Matthias Braun]

Hi andreadb,

There doesn't seem to be a reason for the this target ISD node matching
code to be an InstCombine. Moving it to the lowering step fixes
http://llvm.org/bugs/show_bug.cgi?id=23296.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9137

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/haddsub.ll

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