[PATCH] Fix flakiness in fp16-promote.ll

[Ahmed Bougacha]

I'm fine with this, even though I'd prefer the very explicit tests, for instance with [[R1:r[0-9]+]] patterns to not care about register allocation. It seems to me that we're at a point in the project's life where it's much more important to avoid regressions than to make it easy to add new features.

Note that one advantage of just checking for instructions is that, for the -LIBCALL/-FP16, one trick you can use to avoid duplicating the entire checks is to have an initial pattern, but then test everything using that pattern in generic CHECK: lines.  So, at the very first match, you'd have:

  ; CHECK-LABEL: test_fadd:
  ; CHECK-FP16: [[F16_TO_F32:vcvtb.f32.f16]]
  ; CHECK-LIBCALL: [[F16_TO_F32:bl __gnu_h2f_ieee]]
  ; CHECK: [[F32_TO_F16]]
  ; CHECK: vadd.f32
  ; CHECK-FP16: [[F32_TO_F16:vcvtb.f16.f32]]
  ; CHECK-LIBCALL: [[F32_TO_F16:bl __gnu_f2h_ieee]]

That lets you avoid duplicating most of the remaining CHECK lines:

  ; CHECK-LABEL: test_fsub:
  ; CHECK: [[F16_TO_F32]]
  ; CHECK: [[F16_TO_F32]]
  ; CHECK: vsub.f32
  ; CHECK: [[F32_TO_F16]]

(with the appropriate --check-prefix=CHECK, or CHECK-ALL like you have)


================
Comment at: test/CodeGen/ARM/fp16-promote.ll:886
@@ -1255,9 +885,3 @@
 ; CHECK-FP16-LABEL: test_struct_return:
-; CHECK-FP16-NEXT: .fnstart
-; CHECK-FP16-NEXT: ldr r2, [r0]
-; CHECK-FP16-NEXT: ldrh r0, [r0, #4]
-; CHECK-FP16-NEXT: vmov s0, r0
-; CHECK-FP16-NEXT: mov r0, r2
-; CHECK-FP16-NEXT: vcvtb.f32.f16 s0, s0
-; CHECK-FP16-NEXT: vmov r1, s0
-; CHECK-FP16-NEXT: bx lr
+; CHECK-FP16: .fnstart
+; CHECK-FP16: vcvtb.f32.f16
----------------
Without -NEXT, there's no point in checking .fnstart, right?

http://reviews.llvm.org/D9112

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