[llvm] r235307 - [mips][microMIPSr6] Implement disassembler support
Jozef Kolek
jozef.kolek at imgtec.com
Mon Apr 20 07:40:39 PDT 2015
Author: jkolek
Date: Mon Apr 20 09:40:38 2015
New Revision: 235307
URL: http://llvm.org/viewvc/llvm-project?rev=235307&view=rev
Log:
[mips][microMIPSr6] Implement disassembler support
Implement disassembler support for microMIPS32r6.
Differential Revision: http://reviews.llvm.org/D8490
Added:
llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt
Modified:
llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
Modified: llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp?rev=235307&r1=235306&r2=235307&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp Mon Apr 20 09:40:38 2015
@@ -837,10 +837,17 @@ DecodeStatus MipsDisassembler::getInstru
if (Result == MCDisassembler::Fail)
return MCDisassembler::Fail;
- DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
- // Calling the auto-generated decoder function.
- Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
- this, STI);
+ if (hasMips32r6()) {
+ DEBUG(dbgs() << "Trying MicroMips32r632 table (32-bit instructions):\n");
+ // Calling the auto-generated decoder function.
+ Result = decodeInstruction(DecoderTableMicroMips32r632, Instr, Insn, Address,
+ this, STI);
+ } else {
+ DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
+ // Calling the auto-generated decoder function.
+ Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
+ this, STI);
+ }
if (Result != MCDisassembler::Fail) {
Size = 4;
return Result;
Modified: llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td?rev=235307&r1=235306&r2=235307&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td Mon Apr 20 09:40:38 2015
@@ -46,5 +46,7 @@ class BC_MMR6_DESC : BC_MMR6_DESC_BASE<"
//
//===----------------------------------------------------------------------===//
+let DecoderNamespace = "MicroMips32r6" in {
def BALC_MMR6 : R6MMR6Rel, BALC_MMR6_ENC, BALC_MMR6_DESC, ISA_MICROMIPS32R6;
def BC_MMR6 : R6MMR6Rel, BC_MMR6_ENC, BC_MMR6_DESC, ISA_MICROMIPS32R6;
+}
Added: llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt?rev=235307&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt (added)
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt Mon Apr 20 09:40:38 2015
@@ -0,0 +1,7 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 -mattr=micromips | FileCheck %s
+
+# CHECK: balc 14572256
+0xb4 0x37 0x96 0xb8
+
+# CHECK: bc 14572256
+0x94 0x37 0x96 0xb8
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