[lld] r235289 - [Mips] Support R_MICROMIPS_PC18_S3/PC19_S2/PC21_S2/PC26_S2 relocations handling
Simon Atanasyan
simon at atanasyan.com
Mon Apr 20 00:35:07 PDT 2015
Author: atanasyan
Date: Mon Apr 20 02:34:52 2015
New Revision: 235289
URL: http://llvm.org/viewvc/llvm-project?rev=235289&view=rev
Log:
[Mips] Support R_MICROMIPS_PC18_S3/PC19_S2/PC21_S2/PC26_S2 relocations handling
Added:
lld/trunk/test/elf/Mips/rel-pc18-s3-micro.test
lld/trunk/test/elf/Mips/rel-pc19-s2-micro.test
lld/trunk/test/elf/Mips/rel-pc21-s2-micro.test
lld/trunk/test/elf/Mips/rel-pc26-s2-micro.test
Modified:
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp?rev=235289&r1=235288&r2=235289&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp Mon Apr 20 02:34:52 2015
@@ -114,6 +114,14 @@ static MipsRelocationParams getRelocatio
return {4, 0x3ff, 1, false};
case R_MICROMIPS_PC23_S2:
return {4, 0x7fffff, 2, true};
+ case R_MICROMIPS_PC18_S3:
+ return {4, 0x3ffff, 3, true};
+ case R_MICROMIPS_PC19_S2:
+ return {4, 0x7ffff, 2, true};
+ case R_MICROMIPS_PC21_S2:
+ return {4, 0x1fffff, 2, true};
+ case R_MICROMIPS_PC26_S2:
+ return {4, 0x3ffffff, 2, true};
case R_MIPS_CALL16:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_LDM:
@@ -269,7 +277,7 @@ static uint64_t relocGPRel32(uint64_t S,
return A + S - GP;
}
-/// \brief R_MIPS_PC18_S3
+/// \brief R_MIPS_PC18_S3, R_MICROMIPS_PC18_S3
/// local/external: (S + A - P) >> 3 (P with cleared 3 less significant bits)
static uint32_t relocPc18(uint64_t P, uint64_t S, int64_t A) {
A = llvm::SignExtend32<21>(A);
@@ -278,7 +286,7 @@ static uint32_t relocPc18(uint64_t P, ui
return result >> 3;
}
-/// \brief R_MIPS_PC19_S2
+/// \brief R_MIPS_PC19_S2, R_MICROMIPS_PC19_S2
/// local/external: (S + A - P) >> 2
static uint32_t relocPc19(uint64_t P, uint64_t S, int64_t A) {
A = llvm::SignExtend32<21>(A);
@@ -287,7 +295,7 @@ static uint32_t relocPc19(uint64_t P, ui
return result >> 2;
}
-/// \brief R_MIPS_PC21_S2
+/// \brief R_MIPS_PC21_S2, R_MICROMIPS_PC21_S2
/// local/external: (S + A - P) >> 2
static uint32_t relocPc21(uint64_t P, uint64_t S, int64_t A) {
A = llvm::SignExtend32<23>(A);
@@ -296,7 +304,7 @@ static uint32_t relocPc21(uint64_t P, ui
return result >> 2;
}
-/// \brief R_MIPS_PC26_S2
+/// \brief R_MIPS_PC26_S2, R_MICROMIPS_PC26_S2
/// local/external: (S + A - P) >> 2
static uint32_t relocPc26(uint64_t P, uint64_t S, int64_t A) {
A = llvm::SignExtend32<28>(A);
@@ -457,12 +465,16 @@ static ErrorOr<uint64_t> calculateReloca
case R_MICROMIPS_GOT_OFST:
return relocGOTOfst(tgtAddr, addend);
case R_MIPS_PC18_S3:
+ case R_MICROMIPS_PC18_S3:
return relocPc18(relAddr, tgtAddr, addend);
case R_MIPS_PC19_S2:
+ case R_MICROMIPS_PC19_S2:
return relocPc19(relAddr, tgtAddr, addend);
case R_MIPS_PC21_S2:
+ case R_MICROMIPS_PC21_S2:
return relocPc21(relAddr, tgtAddr, addend);
case R_MIPS_PC26_S2:
+ case R_MICROMIPS_PC26_S2:
return relocPc26(relAddr, tgtAddr, addend);
case R_MICROMIPS_PC7_S1:
return relocPc7(relAddr, tgtAddr, addend);
Added: lld/trunk/test/elf/Mips/rel-pc18-s3-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc18-s3-micro.test?rev=235289&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc18-s3-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc18-s3-micro.test Mon Apr 20 02:34:52 2015
@@ -0,0 +1,56 @@
+# Check handling of R_MICROMIPS_PC18_S3 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: {{[0-9A-F]+}} 00000000 00000100 00000000 00000000
+# ^ V
+# A = -1 << 3 = -8 =>
+# V = (T1 - 8 - (T0|7)^7) >> 3 =>
+# V => 8 >> 3 = 1 (shuffled)
+
+# CHECK: SYMBOL TABLE:
+# CHECK: {{[0-9A-F]+}} g F .text 00000010 T0
+# CHECK: {{[0-9A-F]+}} g F .text 00000004 T1
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Content: "000000000300ffff000000000000000000000000"
+# ^ T1
+# ^ T0 ^ A := 0x3ffff == -1 (shuffled)
+ AddressAlign: 16
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name: .rel.text
+ Type: SHT_REL
+ Info: .text
+ AddressAlign: 4
+ Relocations:
+ - Offset: 4
+ Symbol: T1
+ Type: R_MICROMIPS_PC18_S3
+
+Symbols:
+ Global:
+ - Name: T0
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 16
+ Other: [STO_MIPS_MICROMIPS]
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 16
+ Size: 4
+ Other: [STO_MIPS_MICROMIPS]
Added: lld/trunk/test/elf/Mips/rel-pc19-s2-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc19-s2-micro.test?rev=235289&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc19-s2-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc19-s2-micro.test Mon Apr 20 02:34:52 2015
@@ -0,0 +1,56 @@
+# Check handling of R_MICROMIPS_PC19_S2 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: {{[0-9A-F]+}} 00000100 00000000 00000000
+# ^ V
+# A = -1 << 2 = -4 =>
+# V = (T1 - 4 - T0) >> 2 =>
+# V => 4 >> 2 = 1 (shuffled)
+
+# CHECK: SYMBOL TABLE:
+# CHECK: {{[0-9A-F]+}} g F .text 00000008 T0
+# CHECK: {{[0-9A-F]+}} g F .text 00000004 T1
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Content: "0700ffff0000000000000000"
+# ^ T1
+# ^ T0 A := 0x7ffff == -1 (shuffled)
+ AddressAlign: 16
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name: .rel.text
+ Type: SHT_REL
+ Info: .text
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: T1
+ Type: R_MICROMIPS_PC19_S2
+
+Symbols:
+ Global:
+ - Name: T0
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 8
+ Other: [STO_MIPS_MICROMIPS]
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 8
+ Size: 4
+ Other: [STO_MIPS_MICROMIPS]
Added: lld/trunk/test/elf/Mips/rel-pc21-s2-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc21-s2-micro.test?rev=235289&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc21-s2-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc21-s2-micro.test Mon Apr 20 02:34:52 2015
@@ -0,0 +1,56 @@
+# Check handling of R_MICROMIPS_PC21_S2 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: {{[0-9A-F]+}} 00000100 00000000 00000000
+# ^ V
+# A = -1 << 2 = -4 =>
+# V = (T1 - 4 - T0) >> 2 =>
+# V => 4 >> 2 = 1 (shuffled)
+
+# CHECK: SYMBOL TABLE:
+# CHECK: {{[0-9A-F]+}} g F .text 00000008 T0
+# CHECK: {{[0-9A-F]+}} g F .text 00000004 T1
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Content: "1f00ffff0000000000000000"
+# ^ T1
+# ^ T0 A := 0x1fffff (shuffled)
+ AddressAlign: 16
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name: .rel.text
+ Type: SHT_REL
+ Info: .text
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: T1
+ Type: R_MICROMIPS_PC21_S2
+
+Symbols:
+ Global:
+ - Name: T0
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 8
+ Other: [STO_MIPS_MICROMIPS]
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 8
+ Size: 4
+ Other: [STO_MIPS_MICROMIPS]
Added: lld/trunk/test/elf/Mips/rel-pc26-s2-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc26-s2-micro.test?rev=235289&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc26-s2-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc26-s2-micro.test Mon Apr 20 02:34:52 2015
@@ -0,0 +1,56 @@
+# Check handling of R_MICROMIPS_PC26_S2 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: {{[0-9A-F]+}} 00000100 00000000 00000000
+# ^ V
+# A = -1 << 2 = -4 =>
+# V = (T1 - 4 - T0) >> 2 =>
+# V => 4 >> 2 = 1 (shuffled)
+
+# CHECK: SYMBOL TABLE:
+# CHECK: {{[0-9A-F]+}} g F .text 00000008 T0
+# CHECK: {{[0-9A-F]+}} g F .text 00000004 T1
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6, EF_MIPS_MICROMIPS]
+
+Sections:
+- Name: .text
+ Type: SHT_PROGBITS
+ Content: "ff03ffff0000000000000000"
+# ^ T1
+# ^ T0 A := 0x3ffffff == -1 (shuffled)
+ AddressAlign: 16
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name: .rel.text
+ Type: SHT_REL
+ Info: .text
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: T1
+ Type: R_MICROMIPS_PC26_S2
+
+Symbols:
+ Global:
+ - Name: T0
+ Section: .text
+ Type: STT_FUNC
+ Value: 0
+ Size: 8
+ Other: [STO_MIPS_MICROMIPS]
+ - Name: T1
+ Section: .text
+ Type: STT_FUNC
+ Value: 8
+ Size: 4
+ Other: [STO_MIPS_MICROMIPS]
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