[llvm] r235079 - TRUNCATE constant folding - minor fix for rL233224
Patrik Hägglund H
patrik.h.hagglund at ericsson.com
Sun Apr 19 11:55:34 PDT 2015
Hi Simon,
This commit is causing a regression for the following testcase on x86 (generated by llvm-stress and then reduced):
define void @autogen_SD13708(i32) {
BB:
%Shuff7 = shufflevector <8 x i32> zeroinitializer, <8 x i32> zeroinitializer, <8 x i32> <i32 8, i32 10, i32 12, i32 14, i32 undef, i32 2, i32 4, i32 undef>
br label %CF
CF:
%Tr = trunc <8 x i64> zeroinitializer to <8 x i32>
%Shuff20 = shufflevector <8 x i32> %Shuff7, <8 x i32> %Tr, <8 x i32> <i32 13, i32 15, i32 1, i32 3, i32 5, i32 7, i32 undef, i32 11>
br i1 undef, label %CF, label %CF247
CF247:
%I171 = insertelement <8 x i32> %Shuff20, i32 %0, i32 0
br i1 undef, label %CF, label %CF247
}
bin/llc -march=x86-64 -mcpu=corei7 foo.ll
llc: ../lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2989: llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc, llvm::EVT, llvm::SDValue): Assertion `VT.getSizeInBits() == Operand.getValueType().getSizeInBits() && "Cannot BITCAST between types of different sizes!"' failed.
0 llc 0x0000000001f1c7d5 llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 44
1 llc 0x0000000001f1cb51
2 llc 0x0000000001f1b729
3 libpthread.so.0 0x00007ff8431a8810
4 libc.so.6 0x00007ff8429c3755 gsignal + 53
5 libc.so.6 0x00007ff8429c4d31 abort + 385
6 libc.so.6 0x00007ff8429bc610 __assert_fail + 240
7 llc 0x0000000001da0fb3 llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc, llvm::EVT, llvm::SDValue) + 8345
8 llc 0x000000000146668f
9 llc 0x00000000014668fb
10 llc 0x000000000146c744
11 llc 0x0000000001473c93
12 llc 0x000000000147eb70
13 llc 0x00000000014b631b llvm::X86TargetLowering::LowerOperation(llvm::SDValue, llvm::SelectionDAG&) const + 389
14 llc 0x0000000001d5988b
15 llc 0x0000000001d71358 llvm::SelectionDAG::Legalize() + 298
16 llc 0x0000000001e11f72 llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 2960
17 llc 0x0000000001e110b6 llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator<llvm::Instruction const>, llvm::ilist_iterator<llvm::Instruction const>, bool&) + 234
18 llc 0x0000000001e14745 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 2939
19 llc 0x0000000001e10254 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 998
20 llc 0x000000000141f675
21 llc 0x0000000001818007 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 95
22 llc 0x0000000001b4d64c llvm::FPPassManager::runOnFunction(llvm::Function&) + 290
23 llc 0x0000000001b4d7bc llvm::FPPassManager::runOnModule(llvm::Module&) + 84
24 llc 0x0000000001b4db10
25 llc 0x0000000001b4e1ac llvm::legacy::PassManagerImpl::run(llvm::Module&) + 250
26 llc 0x0000000001b4e3cd llvm::legacy::PassManager::run(llvm::Module&) + 39
27 llc 0x0000000000c26bf5
28 llc 0x0000000000c25cdb main + 242
29 libc.so.6 0x00007ff8429afc16 __libc_start_main + 230
30 llc 0x0000000000c25269
Stack dump:
0. Program arguments: bin/llc -march=x86-64 -mcpu=corei7 /home/uabpath/tmp/foo.ll
1. Running pass 'Function Pass Manager' on module '/home/uabpath/tmp/foo.ll'.
2. Running pass 'X86 DAG->DAG Instruction Selection' on function '@autogen_SD13708'
Abort (core dumped)
/Patrik Hägglund
-----Original Message-----
From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Simon Pilgrim
Sent: den 16 april 2015 10:21
To: llvm-commits at cs.uiuc.edu
Subject: [llvm] r235079 - TRUNCATE constant folding - minor fix for rL233224
Author: rksimon
Date: Thu Apr 16 03:21:09 2015
New Revision: 235079
URL: http://llvm.org/viewvc/llvm-project?rev=235079&view=rev
Log:
TRUNCATE constant folding - minor fix for rL233224
Fix for test case found by James Molloy - TRUNCATE of constant build vectors can be more simply achieved by simply replacing with a new build vector node with the truncated value type - no need to touch the scalar operands at all.
Added:
llvm/trunk/test/CodeGen/AArch64/fold-constants.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=235079&r1=235078&r2=235079&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Apr 16 03:21:09 2015
@@ -2851,13 +2851,16 @@ SDValue SelectionDAG::getNode(unsigned O
// FIXME: Entirely reasonable to perform folding of other unary
// operations here as the need arises.
break;
+ case ISD::TRUNCATE:
+ // Constant build vector truncation can be done with the original scalar
+ // operands but with a new build vector with the truncated value type.
+ return getNode(ISD::BUILD_VECTOR, DL, VT, BV->ops());
case ISD::FNEG:
case ISD::FABS:
case ISD::FCEIL:
case ISD::FTRUNC:
case ISD::FFLOOR:
case ISD::FP_EXTEND:
- case ISD::TRUNCATE:
case ISD::UINT_TO_FP:
case ISD::SINT_TO_FP: {
// Let the above scalar folding handle the folding of each element.
Added: llvm/trunk/test/CodeGen/AArch64/fold-constants.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fold-constants.ll?rev=235079&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fold-constants.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/fold-constants.ll Thu Apr 16 03:21:09 2015
@@ -0,0 +1,21 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
+
+define i64 @dotests_616() {
+; CHECK-LABEL: dotests_616
+; CHECK: movi d0, #0000000000000000
+; CHECK-NEXT: umov w8, v0.b[2]
+; CHECK-NEXT: sbfx w8, w8, #0, #1
+; CHECK-NEXT: fmov s0, w8
+; CHECK-NEXT: fmov x0, d0
+; CHECK-NEXT: ret
+entry:
+ %0 = bitcast <2 x i64> zeroinitializer to <8 x i16>
+ %1 = and <8 x i16> zeroinitializer, %0
+ %2 = icmp ne <8 x i16> %1, zeroinitializer
+ %3 = extractelement <8 x i1> %2, i32 2
+ %vgetq_lane285 = sext i1 %3 to i16
+ %vset_lane = insertelement <4 x i16> undef, i16 %vgetq_lane285, i32 0
+ %4 = bitcast <4 x i16> %vset_lane to <1 x i64>
+ %vget_lane = extractelement <1 x i64> %4, i32 0
+ ret i64 %vget_lane
+}
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