[PATCH] [mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.

[Toma Tabacu]

Hi dsanders,

Generate one DSLL32 of 0 instead of two consecutive DSLL of 16.
In order to do this I had to change createLShiftOri's template argument from a bool to an unsigned.

This also gave me the opportunity to rewrite the mips64-expansions.s test, as it was testing the same cases multiple times and skipping over other cases.
It was also somewhat unreadable, as the CHECK lines were grouped in a huge block of text at the beginning of the file.

http://reviews.llvm.org/D8974

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  test/MC/Mips/mips64-expansions.s

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