[PATCH] Add direct moves to/from VSR and exploit them for FP/INT conversions
Nemanja Ivanovic
nemanja.i.ibm at gmail.com
Thu Apr 9 20:30:30 PDT 2015
Addressed the comments from Bill and Eric. Notable changes:
- we use conversions directly to single-precision when converting to f32 (rather than converting to f64 and subsequently rounding)
- test case now does not specify a specific register except where required by the ABI (instead a regex is used)
- formatting issues fixed
- removed the unnecessary change to stfiwx.ll test case (since no longer required)
REPOSITORY
rL LLVM
http://reviews.llvm.org/D8928
Files:
lib/Target/PowerPC/PPC.td
lib/Target/PowerPC/PPCFastISel.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrFormats.td
lib/Target/PowerPC/PPCInstrVSX.td
lib/Target/PowerPC/PPCSubtarget.cpp
lib/Target/PowerPC/PPCSubtarget.h
test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
test/MC/Disassembler/PowerPC/vsx.txt
test/MC/PowerPC/vsx.s
EMAIL PREFERENCES
http://reviews.llvm.org/settings/panel/emailpreferences/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D8928.23554.patch
Type: text/x-patch
Size: 26608 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150410/ac8455ef/attachment.bin>
More information about the llvm-commits
mailing list