[PATCH] [CodeGen] Combine concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)

[Ahmed Bougacha]

Hi spatel, qcolombet,

We already do:

  concat_vectors(scalar, undef) -> scalar_to_vector(scalar)

When the scalar is legal.  When it's not, but is a truncated legal scalar, we can also do:

  concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)

Which is equivalent, since the upper lanes are undef anyway.

To achieve that, we need to teach the original combine to look at multiple UNDEF operands, not just 1.  I can't think of a case where than happens in isolation, so let's consider it part of this combine.

http://reviews.llvm.org/D8883

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/concat_vector-truncate-combine.ll

Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11513,16 +11513,29 @@
   if (ISD::allOperandsUndef(N))
     return DAG.getUNDEF(VT);
 
-  // Optimize concat_vectors where one of the vectors is undef.
-  if (N->getNumOperands() == 2 &&
-      N->getOperand(1)->getOpcode() == ISD::UNDEF) {
+  // Optimize concat_vectors where all but the first of the vectors are undef.
+  auto IsUndef = [](const SDValue &Op) {
+    return ISD::UNDEF == Op.getOpcode();
+  };
+  bool AllButFirstUndefs =
+      std::all_of(N->op_begin() + 1, N->op_end(), IsUndef);
+  if (AllButFirstUndefs) {
     SDValue In = N->getOperand(0);
     assert(In.getValueType().isVector() && "Must concat vectors");
 
     // Transform: concat_vectors(scalar, undef) -> scalar_to_vector(sclr).
     if (In->getOpcode() == ISD::BITCAST &&
         !In->getOperand(0)->getValueType(0).isVector()) {
       SDValue Scalar = In->getOperand(0);
+
+      // If the bitcast type isn't legal, it might be a trunc of a legal type;
+      // look through the trunc so we can still do the transform:
+      //   concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)
+      if (Scalar->getOpcode() == ISD::TRUNCATE &&
+          !TLI.isTypeLegal(Scalar.getValueType()) &&
+          TLI.isTypeLegal(Scalar->getOperand(0).getValueType()))
+        Scalar = Scalar->getOperand(0);
+
       EVT SclTy = Scalar->getValueType(0);
 
       if (!SclTy.isFloatingPoint() && !SclTy.isInteger())
Index: test/CodeGen/AArch64/concat_vector-truncate-combine.ll
===================================================================
--- test/CodeGen/AArch64/concat_vector-truncate-combine.ll
+++ test/CodeGen/AArch64/concat_vector-truncate-combine.ll
@@ -2,6 +2,8 @@
 
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
+; Test the (concat_vectors (trunc), (trunc)) pattern.
+
 define <4 x i16> @test_concat_truncate_v2i64_to_v4i16(<2 x i64> %a, <2 x i64> %b) #0 {
 entry:
 ; CHECK-LABEL: test_concat_truncate_v2i64_to_v4i16:
@@ -38,4 +40,17 @@
   ret <8 x i16> %shuffle
 }
 
+; Test the (concat_vectors (bitcast (trunc (scalar))), undef..) pattern.
+
+define <8 x i8> @test_concat_from_truncated_scalar(i32 %x) #0 {
+entry:
+; CHECK-LABEL: test_concat_from_truncated_scalar:
+; CHECK-NEXT: fmov s0, w0
+; CHECK-NEXT: ret
+  %t = trunc i32 %x to i16
+  %0 = bitcast i16 %t to <2 x i8>
+  %1 = shufflevector <2 x i8> %0, <2 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
+  ret <8 x i8> %1
+}
+
 attributes #0 = { nounwind }

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