[PATCH] Sparc: Implement LDD/STD double-word load/store instructions.

[James Y Knight]

These instructions load/store a 64bit quantity from/to memory to/from a pair of (32-bit) registers. They are part of SparcV8, and also present in SparcV9, although deprecated.

In the current state, they do not actually get used automatically, only via assembly code.

Notes:

This patch accomplishes my first goal of supporting it in asm code. 
I'd *additionally* like it if C code like:
  long long x,y;
  void f() { y = x; }
turned into just "ldd, std" (as it does in GCC), rather than loading and storing the two halfs of the variables separately. However, this patch does not accomplish that, as it stands.

To allow that, I'm not sure if adding:
 addRegisterClass(MVT::i64, &SP::IntPairRegClass)
for 32bit sparc build would be required?  If so, it seems to me that a whole lot of other code will need to be added to tell it to expand i64 to i32 operations for everything other than load/store, won't it? That seems kinda ugly.

Or, is there some better way to notate the special case that loads/stores (only) can be done on 64bit quantities? Please let me know.

(Regardless of the above, I think it probably makes sense to commit a relatively simple patch like this, just adding the instructions first, before dealing with making them emitted automatically.)

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D8713

Files:
  lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
  lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
  lib/Target/Sparc/SparcInstrInfo.td
  lib/Target/Sparc/SparcRegisterInfo.td
  test/MC/Disassembler/Sparc/sparc-mem.txt
  test/MC/Sparc/sparc-mem-instructions.s

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