[llvm] r233473 - clang-format X86ATTInstPrinter.{h, cpp} before I make changes to these files.

Akira Hatanaka ahatanak at gmail.com
Fri Mar 27 21:37:33 PDT 2015


Sure, I'll revert the changes I made to those functions in a moment.

On Fri, Mar 27, 2015 at 9:33 PM, Craig Topper <craig.topper at gmail.com>
wrote:

> Can you change printSSEAVXCC, printXOPCC, and printRoundingControl back?
> They were much more concise before.
>
> On Fri, Mar 27, 2015 at 9:25 PM, Akira Hatanaka <ahatanaka at apple.com>
> wrote:
>
>> Author: ahatanak
>> Date: Fri Mar 27 23:25:41 2015
>> New Revision: 233473
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=233473&view=rev
>> Log:
>> clang-format X86ATTInstPrinter.{h,cpp} before I make changes to these
>> files.
>>
>> Modified:
>>     llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
>>     llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
>>
>> Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp?rev=233473&r1=233472&r2=233473&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp (original)
>> +++ llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp Fri Mar
>> 27 23:25:41 2015
>> @@ -33,11 +33,8 @@ using namespace llvm;
>>  #define PRINT_ALIAS_INSTR
>>  #include "X86GenAsmWriter.inc"
>>
>> -void X86ATTInstPrinter::printRegName(raw_ostream &OS,
>> -                                     unsigned RegNo) const {
>> -  OS << markup("<reg:")
>> -     << '%' << getRegisterName(RegNo)
>> -     << markup(">");
>> +void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo)
>> const {
>> +  OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
>>  }
>>
>>  void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
>> @@ -76,39 +73,104 @@ void X86ATTInstPrinter::printSSEAVXCC(co
>>                                        raw_ostream &O) {
>>    int64_t Imm = MI->getOperand(Op).getImm();
>>    switch (Imm) {
>> -  default: llvm_unreachable("Invalid ssecc/avxcc argument!");
>> -  case    0: O << "eq"; break;
>> -  case    1: O << "lt"; break;
>> -  case    2: O << "le"; break;
>> -  case    3: O << "unord"; break;
>> -  case    4: O << "neq"; break;
>> -  case    5: O << "nlt"; break;
>> -  case    6: O << "nle"; break;
>> -  case    7: O << "ord"; break;
>> -  case    8: O << "eq_uq"; break;
>> -  case    9: O << "nge"; break;
>> -  case  0xa: O << "ngt"; break;
>> -  case  0xb: O << "false"; break;
>> -  case  0xc: O << "neq_oq"; break;
>> -  case  0xd: O << "ge"; break;
>> -  case  0xe: O << "gt"; break;
>> -  case  0xf: O << "true"; break;
>> -  case 0x10: O << "eq_os"; break;
>> -  case 0x11: O << "lt_oq"; break;
>> -  case 0x12: O << "le_oq"; break;
>> -  case 0x13: O << "unord_s"; break;
>> -  case 0x14: O << "neq_us"; break;
>> -  case 0x15: O << "nlt_uq"; break;
>> -  case 0x16: O << "nle_uq"; break;
>> -  case 0x17: O << "ord_s"; break;
>> -  case 0x18: O << "eq_us"; break;
>> -  case 0x19: O << "nge_uq"; break;
>> -  case 0x1a: O << "ngt_uq"; break;
>> -  case 0x1b: O << "false_os"; break;
>> -  case 0x1c: O << "neq_os"; break;
>> -  case 0x1d: O << "ge_oq"; break;
>> -  case 0x1e: O << "gt_oq"; break;
>> -  case 0x1f: O << "true_us"; break;
>> +  default:
>> +    llvm_unreachable("Invalid ssecc/avxcc argument!");
>> +  case 0:
>> +    O << "eq";
>> +    break;
>> +  case 1:
>> +    O << "lt";
>> +    break;
>> +  case 2:
>> +    O << "le";
>> +    break;
>> +  case 3:
>> +    O << "unord";
>> +    break;
>> +  case 4:
>> +    O << "neq";
>> +    break;
>> +  case 5:
>> +    O << "nlt";
>> +    break;
>> +  case 6:
>> +    O << "nle";
>> +    break;
>> +  case 7:
>> +    O << "ord";
>> +    break;
>> +  case 8:
>> +    O << "eq_uq";
>> +    break;
>> +  case 9:
>> +    O << "nge";
>> +    break;
>> +  case 0xa:
>> +    O << "ngt";
>> +    break;
>> +  case 0xb:
>> +    O << "false";
>> +    break;
>> +  case 0xc:
>> +    O << "neq_oq";
>> +    break;
>> +  case 0xd:
>> +    O << "ge";
>> +    break;
>> +  case 0xe:
>> +    O << "gt";
>> +    break;
>> +  case 0xf:
>> +    O << "true";
>> +    break;
>> +  case 0x10:
>> +    O << "eq_os";
>> +    break;
>> +  case 0x11:
>> +    O << "lt_oq";
>> +    break;
>> +  case 0x12:
>> +    O << "le_oq";
>> +    break;
>> +  case 0x13:
>> +    O << "unord_s";
>> +    break;
>> +  case 0x14:
>> +    O << "neq_us";
>> +    break;
>> +  case 0x15:
>> +    O << "nlt_uq";
>> +    break;
>> +  case 0x16:
>> +    O << "nle_uq";
>> +    break;
>> +  case 0x17:
>> +    O << "ord_s";
>> +    break;
>> +  case 0x18:
>> +    O << "eq_us";
>> +    break;
>> +  case 0x19:
>> +    O << "nge_uq";
>> +    break;
>> +  case 0x1a:
>> +    O << "ngt_uq";
>> +    break;
>> +  case 0x1b:
>> +    O << "false_os";
>> +    break;
>> +  case 0x1c:
>> +    O << "neq_os";
>> +    break;
>> +  case 0x1d:
>> +    O << "ge_oq";
>> +    break;
>> +  case 0x1e:
>> +    O << "gt_oq";
>> +    break;
>> +  case 0x1f:
>> +    O << "true_us";
>> +    break;
>>    }
>>  }
>>
>> @@ -116,26 +178,51 @@ void X86ATTInstPrinter::printXOPCC(const
>>                                     raw_ostream &O) {
>>    int64_t Imm = MI->getOperand(Op).getImm();
>>    switch (Imm) {
>> -  default: llvm_unreachable("Invalid xopcc argument!");
>> -  case 0: O << "lt"; break;
>> -  case 1: O << "le"; break;
>> -  case 2: O << "gt"; break;
>> -  case 3: O << "ge"; break;
>> -  case 4: O << "eq"; break;
>> -  case 5: O << "neq"; break;
>> -  case 6: O << "false"; break;
>> -  case 7: O << "true"; break;
>> +  default:
>> +    llvm_unreachable("Invalid xopcc argument!");
>> +  case 0:
>> +    O << "lt";
>> +    break;
>> +  case 1:
>> +    O << "le";
>> +    break;
>> +  case 2:
>> +    O << "gt";
>> +    break;
>> +  case 3:
>> +    O << "ge";
>> +    break;
>> +  case 4:
>> +    O << "eq";
>> +    break;
>> +  case 5:
>> +    O << "neq";
>> +    break;
>> +  case 6:
>> +    O << "false";
>> +    break;
>> +  case 7:
>> +    O << "true";
>> +    break;
>>    }
>>  }
>>
>>  void X86ATTInstPrinter::printRoundingControl(const MCInst *MI, unsigned
>> Op,
>> -                                            raw_ostream &O) {
>> +                                             raw_ostream &O) {
>>    int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
>>    switch (Imm) {
>> -  case 0: O << "{rn-sae}"; break;
>> -  case 1: O << "{rd-sae}"; break;
>> -  case 2: O << "{ru-sae}"; break;
>> -  case 3: O << "{rz-sae}"; break;
>> +  case 0:
>> +    O << "{rn-sae}";
>> +    break;
>> +  case 1:
>> +    O << "{rd-sae}";
>> +    break;
>> +  case 2:
>> +    O << "{ru-sae}";
>> +    break;
>> +  case 3:
>> +    O << "{rz-sae}";
>> +    break;
>>    }
>>  }
>>  /// printPCRelImm - This is used to print an immediate value that ends up
>> @@ -169,8 +256,7 @@ void X86ATTInstPrinter::printOperand(con
>>      printRegName(O, Op.getReg());
>>    } else if (Op.isImm()) {
>>      // Print X86 immediates as signed values.
>> -    O << markup("<imm:")
>> -      << '$' << formatImm((int64_t)Op.getImm())
>> +    O << markup("<imm:") << '$' << formatImm((int64_t)Op.getImm())
>>        << markup(">");
>>
>>      // If there are no instruction-specific comments, add a comment
>> clarifying
>> @@ -182,24 +268,22 @@ void X86ATTInstPrinter::printOperand(con
>>
>>    } else {
>>      assert(Op.isExpr() && "unknown operand kind in printOperand");
>> -    O << markup("<imm:")
>> -      << '$' << *Op.getExpr()
>> -      << markup(">");
>> +    O << markup("<imm:") << '$' << *Op.getExpr() << markup(">");
>>    }
>>  }
>>
>>  void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
>>                                            raw_ostream &O) {
>> -  const MCOperand &BaseReg  = MI->getOperand(Op+X86::AddrBaseReg);
>> -  const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg);
>> -  const MCOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp);
>> -  const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg);
>> +  const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg);
>> +  const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
>> +  const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp);
>> +  const MCOperand &SegReg = MI->getOperand(Op + X86::AddrSegmentReg);
>>
>>    O << markup("<mem:");
>>
>>    // If this has a segment register, print it.
>>    if (SegReg.getReg()) {
>> -    printOperand(MI, Op+X86::AddrSegmentReg, O);
>> +    printOperand(MI, Op + X86::AddrSegmentReg, O);
>>      O << ':';
>>    }
>>
>> @@ -215,16 +299,14 @@ void X86ATTInstPrinter::printMemReferenc
>>    if (IndexReg.getReg() || BaseReg.getReg()) {
>>      O << '(';
>>      if (BaseReg.getReg())
>> -      printOperand(MI, Op+X86::AddrBaseReg, O);
>> +      printOperand(MI, Op + X86::AddrBaseReg, O);
>>
>>      if (IndexReg.getReg()) {
>>        O << ',';
>> -      printOperand(MI, Op+X86::AddrIndexReg, O);
>> -      unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm();
>> +      printOperand(MI, Op + X86::AddrIndexReg, O);
>> +      unsigned ScaleVal = MI->getOperand(Op +
>> X86::AddrScaleAmt).getImm();
>>        if (ScaleVal != 1) {
>> -        O << ','
>> -          << markup("<imm:")
>> -          << ScaleVal // never printed in hex.
>> +        O << ',' << markup("<imm:") << ScaleVal // never printed in hex.
>>            << markup(">");
>>        }
>>      }
>> @@ -236,13 +318,13 @@ void X86ATTInstPrinter::printMemReferenc
>>
>>  void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
>>                                      raw_ostream &O) {
>> -  const MCOperand &SegReg = MI->getOperand(Op+1);
>> +  const MCOperand &SegReg = MI->getOperand(Op + 1);
>>
>>    O << markup("<mem:");
>>
>>    // If this has a segment register, print it.
>>    if (SegReg.getReg()) {
>> -    printOperand(MI, Op+1, O);
>> +    printOperand(MI, Op + 1, O);
>>      O << ':';
>>    }
>>
>> @@ -267,13 +349,13 @@ void X86ATTInstPrinter::printDstIdx(cons
>>  void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
>>                                         raw_ostream &O) {
>>    const MCOperand &DispSpec = MI->getOperand(Op);
>> -  const MCOperand &SegReg = MI->getOperand(Op+1);
>> +  const MCOperand &SegReg = MI->getOperand(Op + 1);
>>
>>    O << markup("<mem:");
>>
>>    // If this has a segment register, print it.
>>    if (SegReg.getReg()) {
>> -    printOperand(MI, Op+1, O);
>> +    printOperand(MI, Op + 1, O);
>>      O << ':';
>>    }
>>
>> @@ -289,7 +371,6 @@ void X86ATTInstPrinter::printMemOffset(c
>>
>>  void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
>>                                     raw_ostream &O) {
>> -  O << markup("<imm:")
>> -    << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff)
>> +  O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() &
>> 0xff)
>>      << markup(">");
>>  }
>>
>> Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h?rev=233473&r1=233472&r2=233473&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h (original)
>> +++ llvm/trunk/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h Fri Mar 27
>> 23:25:41 2015
>> @@ -25,7 +25,7 @@ class X86ATTInstPrinter final : public M
>>  public:
>>    X86ATTInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
>>                      const MCRegisterInfo &MRI, const MCSubtargetInfo
>> &STI)
>> -    : MCInstPrinter(MAI, MII, MRI) {
>> +      : MCInstPrinter(MAI, MII, MRI) {
>>      // Initialize the set of available features.
>>      setAvailableFeatures(STI.getFeatureBits());
>>    }
>> @@ -143,7 +143,6 @@ public:
>>  private:
>>    bool HasCustomInstComment;
>>  };
>> -
>>  }
>>
>>  #endif
>>
>>
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>> llvm-commits at cs.uiuc.edu
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>>
>
>
>
> --
> ~Craig
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
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