[llvm] r233303 - Adds an option to disable ARM ld/st optim pass
Renato Golin
renato.golin at linaro.org
Thu Mar 26 11:38:04 PDT 2015
Author: rengolin
Date: Thu Mar 26 13:38:04 2015
New Revision: 233303
URL: http://llvm.org/viewvc/llvm-project?rev=233303&view=rev
Log:
Adds an option to disable ARM ld/st optim pass
Enabled by default, but it's useful when debugging with llc.
Patch by Ranjeet Singh.
Modified:
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=233303&r1=233302&r2=233303&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Thu Mar 26 13:38:04 2015
@@ -37,6 +37,11 @@ EnableAtomicTidy("arm-atomic-cfg-tidy",
" to make use of cmpxchg flow-based information"),
cl::init(true));
+static cl::opt<bool>
+EnableARMLoadStoreOpt("arm-load-store-opt", cl::Hidden,
+ cl::desc("Enable ARM load/store optimization pass"),
+ cl::init(true));
+
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
RegisterTargetMachine<ARMLETargetMachine> X(TheARMLETarget);
@@ -348,18 +353,22 @@ bool ARMPassConfig::addInstSelector() {
}
void ARMPassConfig::addPreRegAlloc() {
- if (getOptLevel() != CodeGenOpt::None)
- addPass(createARMLoadStoreOptimizationPass(true));
- if (getOptLevel() != CodeGenOpt::None)
+ if (getOptLevel() != CodeGenOpt::None) {
addPass(createMLxExpansionPass());
- if (getOptLevel() != CodeGenOpt::None && !DisableA15SDOptimization) {
- addPass(createA15SDOptimizerPass());
+
+ if (EnableARMLoadStoreOpt)
+ addPass(createARMLoadStoreOptimizationPass(/* pre-register alloc */ true));
+
+ if (!DisableA15SDOptimization)
+ addPass(createA15SDOptimizerPass());
}
}
void ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
- addPass(createARMLoadStoreOptimizationPass());
+ if (EnableARMLoadStoreOpt)
+ addPass(createARMLoadStoreOptimizationPass());
+
addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
}
@@ -373,7 +382,7 @@ void ARMPassConfig::addPreSched2() {
addPass(createThumb2SizeReductionPass());
if (!getARMSubtarget().isThumb1Only())
addPass(&IfConverterID);
- }
+ }
addPass(createThumb2ITBlockPass());
}
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