[PATCH] Add a way to enable/disable the ARM load/store optimization pass
Eric Christopher
echristo at gmail.com
Thu Mar 26 08:20:42 PDT 2015
LGTM as well.
On Thu, Mar 26, 2015, 6:15 AM Ranjeet Singh <ranjeet.singh at arm.com> wrote:
> Hi Renato,
>
> Thanks for the code review.
>
> I've attached another patch with your suggested changes. I don't have
> commit access yet, so could you commit this one?
> I'll go through the process today to get commit rights.
>
> Thanks,
> Ranjeet
>
>
> http://reviews.llvm.org/D8630
>
> Files:
> lib/Target/ARM/ARMTargetMachine.cpp
>
> Index: lib/Target/ARM/ARMTargetMachine.cpp
> ===================================================================
> --- lib/Target/ARM/ARMTargetMachine.cpp
> +++ lib/Target/ARM/ARMTargetMachine.cpp
> @@ -37,6 +37,11 @@
> " to make use of cmpxchg flow-based
> information"),
> cl::init(true));
>
> +static cl::opt<bool>
> +EnableARMLoadStoreOpt("arm-load-store-opt", cl::Hidden,
> + cl::desc("Enable ARM load/store optimization pass"),
> + cl::init(true));
> +
> extern "C" void LLVMInitializeARMTarget() {
> // Register the target.
> RegisterTargetMachine<ARMLETargetMachine> X(TheARMLETarget);
> @@ -348,18 +353,22 @@
> }
>
> void ARMPassConfig::addPreRegAlloc() {
> - if (getOptLevel() != CodeGenOpt::None)
> - addPass(createARMLoadStoreOptimizationPass(true));
> - if (getOptLevel() != CodeGenOpt::None)
> + if (getOptLevel() != CodeGenOpt::None) {
> addPass(createMLxExpansionPass());
> - if (getOptLevel() != CodeGenOpt::None && !DisableA15SDOptimization) {
> - addPass(createA15SDOptimizerPass());
> +
> + if (EnableARMLoadStoreOpt)
> + addPass(createARMLoadStoreOptimizationPass(/* pre-register alloc
> */ true));
> +
> + if (!DisableA15SDOptimization)
> + addPass(createA15SDOptimizerPass());
> }
> }
>
> void ARMPassConfig::addPreSched2() {
> if (getOptLevel() != CodeGenOpt::None) {
> - addPass(createARMLoadStoreOptimizationPass());
> + if (EnableARMLoadStoreOpt)
> + addPass(createARMLoadStoreOptimizationPass());
> +
> addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
> }
>
> @@ -373,7 +382,7 @@
> addPass(createThumb2SizeReductionPass());
> if (!getARMSubtarget().isThumb1Only())
> addPass(&IfConverterID);
> - }
> + }
> addPass(createThumb2ITBlockPass());
> }
>
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