[PATCH] [mips][microMIPSr6] Implement disassembler support

[Jozef Kolek]

http://reviews.llvm.org/D8490

Files:
  lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  lib/Target/Mips/MicroMipsR6InstrInfo.td
  test/MC/Disassembler/Mips/micromips32r6.txt

Index: lib/Target/Mips/Disassembler/MipsDisassembler.cpp
===================================================================
--- lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -45,6 +45,10 @@
     return STI.getFeatureBits() & Mips::FeatureMips32r6;
   }
 
+  bool hasMicroMips32r6() const {
+    return STI.getFeatureBits() & Mips::FeatureMicroMipsR6;
+  }
+
   bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; }
 
   bool hasCOP3() const {
@@ -821,7 +825,7 @@
   uint32_t Insn;
   DecodeStatus Result;
 
-  if (IsMicroMips) {
+  if (IsMicroMips || hasMicroMips32r6()) {
     Result = readInstruction16(Bytes, Address, Size, Insn, IsBigEndian);
 
     DEBUG(dbgs() << "Trying MicroMips16 table (16-bit instructions):\n");
@@ -837,10 +841,17 @@
     if (Result == MCDisassembler::Fail)
       return MCDisassembler::Fail;
 
-    DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
-    // Calling the auto-generated decoder function.
-    Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
-                               this, STI);
+    if (IsMicroMips) {
+      DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
+      // Calling the auto-generated decoder function.
+      Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
+                                 this, STI);
+    } else {
+      DEBUG(dbgs() << "Trying MicroMips32r632 table (32-bit instructions):\n");
+      // Calling the auto-generated decoder function.
+      Result = decodeInstruction(DecoderTableMicroMips32r632, Instr, Insn, Address,
+                                 this, STI);
+    }
     if (Result != MCDisassembler::Fail) {
       Size = 4;
       return Result;
Index: lib/Target/Mips/MicroMipsR6InstrInfo.td
===================================================================
--- lib/Target/Mips/MicroMipsR6InstrInfo.td
+++ lib/Target/Mips/MicroMipsR6InstrInfo.td
@@ -96,6 +96,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+let DecoderNamespace = "MicroMips32r6" in {
 def ALUIPC_MMR6 : MMR6Rel, ALUIPC_MMR6_ENC, ALUIPC_MMR6_DESC, ISA_MICROMIPSR6;
 def AUIPC_MMR6 : MMR6Rel, AUIPC_MMR6_ENC, AUIPC_MMR6_DESC, ISA_MICROMIPSR6;
 def ADDIUPC_MMR6 : MMR6Rel, ADDIUPC_MMR6_ENC, ADDIUPC_MMR6_DESC, ISA_MICROMIPSR6;
@@ -104,3 +105,4 @@
 def JIALC_MMR6 : MMR6Rel, JIALC_MMR6_ENC, JIALC_MMR6_DESC, ISA_MICROMIPSR6;
 def JIC_MMR6 : MMR6Rel, JIC_MMR6_ENC, JIC_MMR6_DESC, ISA_MICROMIPSR6;
 def LWPC_MMR6 : MMR6Rel, LWPC_MMR6_ENC, LWPC_MMR6_DESC, ISA_MICROMIPSR6;
+}
Index: test/MC/Disassembler/Mips/micromips32r6.txt
===================================================================
--- /dev/null
+++ test/MC/Disassembler/Mips/micromips32r6.txt
@@ -0,0 +1,25 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 -mattr=micromipsr6 | FileCheck %s
+
+# CHECK: aluipc $3, 56
+0x78 0x7f 0x00 0x38
+
+# CHECK: auipc $3, -1
+0x78 0x7e 0xff 0xff
+
+# CHECK: addiupc $4, 100
+0x78 0x80 0x00 0x19
+
+# CHECK: balc 14572256
+0xb4 0x37 0x96 0xb8
+
+# CHECK: bc 14572256
+0x94 0x37 0x96 0xb8
+
+# CHECK: jialc $5, 256
+0xa4 0x05 0x01 0x00
+
+# CHECK: jic $5, 256
+0xa0 0x05 0x01 0x00
+
+# CHECK: lwpc $2, 268
+0x78 0x48 0x00 0x43

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