[x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.

[Daniel Sanders]

Ping. The main thing I'm looking for is for is for someone with knowledge of the target to say whether they're aware of any supported constraints that this patch doesn't cover.

Chris: I've CC'd you since Nadav suggested I CC the original author of the code and I found that (cosmetic changes aside) it was added by you way back in r28728 (which was in 2006).

> -----Original Message-----
> From: Daniel Sanders
> Sent: 11 March 2015 15:16
> To: Daniel Sanders; nrotem at apple.com
> Cc: llvm-commits at cs.uiuc.edu
> Subject: [PATCH] [x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly
> memory constraints.
> 
> Hi nadav,
> 
> But still handle them the same way since I don't know how they differ on
> this target.
> 
> Of these, 'o' and 'v' are not tested but were already implemented.
> 
> I'm not sure why 'i' is required for X86 since it's supposed to be an
> immediate constraint rather than a memory constraint. A test asserts
> without it so I've included it for now.
> 
> No functional change intended. Depends on D8173.
> 
> http://reviews.llvm.org/D8254
> 
> Files:
>   include/llvm/IR/InlineAsm.h
>   lib/Target/X86/X86ISelDAGToDAG.cpp
>   lib/Target/X86/X86ISelLowering.h
> 
> Index: include/llvm/IR/InlineAsm.h
> ==========================================================
> =========
> --- include/llvm/IR/InlineAsm.h
> +++ include/llvm/IR/InlineAsm.h
> @@ -239,13 +239,15 @@
>      // constraint codes for all targets.
>      Constraint_Unknown = 0,
>      Constraint_es,
> +    Constraint_i,
>      Constraint_m,
>      Constraint_o,
>      Constraint_v,
>      Constraint_Q,
>      Constraint_R,
>      Constraint_S,
>      Constraint_T,
> +    Constraint_X,
>      Constraint_Um,
>      Constraint_Un,
>      Constraint_Uq,
> Index: lib/Target/X86/X86ISelDAGToDAG.cpp
> ==========================================================
> =========
> --- lib/Target/X86/X86ISelDAGToDAG.cpp
> +++ lib/Target/X86/X86ISelDAGToDAG.cpp
> @@ -2818,10 +2818,16 @@
>                               std::vector<SDValue> &OutOps) {
>    SDValue Op0, Op1, Op2, Op3, Op4;
>    switch (ConstraintID) {
> +  default:
> +    llvm_unreachable("Unexpected asm memory constraint");
> +  case InlineAsm::Constraint_i:
> +    // FIXME: It seems strange that 'i' is needed here since it's supposed to
> +    //        be an immediate and not a memory constraint.
> +    // Fallthrough.
>    case InlineAsm::Constraint_o: // offsetable        ??
>    case InlineAsm::Constraint_v: // not offsetable    ??
> -  default: return true;
>    case InlineAsm::Constraint_m: // memory
> +  case InlineAsm::Constraint_X:
>      if (!SelectAddr(nullptr, Op, Op0, Op1, Op2, Op3, Op4))
>        return true;
>      break;
> Index: lib/Target/X86/X86ISelLowering.h
> ==========================================================
> =========
> --- lib/Target/X86/X86ISelLowering.h
> +++ lib/Target/X86/X86ISelLowering.h
> @@ -697,8 +697,15 @@
> 
>      unsigned getInlineAsmMemConstraint(
>          const std::string ConstraintCode) const override {
> -      // FIXME: Map different constraints differently.
> -      return InlineAsm::Constraint_m;
> +      if (ConstraintCode == "i")
> +        return InlineAsm::Constraint_i;
> +      else if (ConstraintCode == "o")
> +        return InlineAsm::Constraint_o;
> +      else if (ConstraintCode == "v")
> +        return InlineAsm::Constraint_v;
> +      else if (ConstraintCode == "X")
> +        return InlineAsm::Constraint_X;
> +      return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
>      }
> 
>      /// Given a physical register constraint
> 
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