[llvm] r232561 - Appease AArch64ISelLowering.cpp miscompiled by g++-4.7.2.

Eric Christopher echristo at gmail.com
Tue Mar 17 17:43:39 PDT 2015


Don't we normally do this by blacklisting the particular revision?

On Tue, Mar 17, 2015, 4:02 PM NAKAMURA Takumi <geek4civic at gmail.com> wrote:

> Author: chapuni
> Date: Tue Mar 17 17:55:01 2015
> New Revision: 232561
>
> URL: http://llvm.org/viewvc/llvm-project?rev=232561&view=rev
> Log:
> Appease AArch64ISelLowering.cpp miscompiled by g++-4.7.2.
>
> I will revert this when 4.7.3 is ready.
>
> Modified:
>     llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> AArch64/AArch64ISelLowering.cpp?rev=232561&r1=232560&r2=232561&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Tue Mar 17
> 17:55:01 2015
> @@ -7201,6 +7201,12 @@ static SDValue performConcatVectorsCombi
>          (N00VT == MVT::v2i64 || N00VT == MVT::v4i32) &&
>          N00VT.getScalarSizeInBits() == 4 * VT.getScalarSizeInBits()) {
>        MVT MidVT = (N00VT == MVT::v2i64 ? MVT::v2i32 : MVT::v4i16);
> +#if defined(__GNUC__)
> +#if __GNUC__ == 4 && __GNUC_MINOR__ == 7 && __GNUC_PATCHLEVEL__ == 2
> +      // FIXME: g++-4.7.2 might miscompile PerformDAGCombine().
> +      asm volatile("":::"memory");
> +#endif
> +#endif
>        MVT ConcatMidVT = MVT::getVectorVT(MidVT.getVectorElementType(),
>                                           MidVT.getVectorNumElements() *
> 2);
>        return DAG.getNode(
>
>
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