[PATCH] Add assertion to detect invalid registers in the PowerPC MC instruction lowering

[Samuel Antao]

Hi hfinkel,

We have observed that noreg was being generated due to a bug in FastIsel and was not being detected during emission. It happens that  in the Asm emission there is an assertion that detects this in getRegisterName() from the tbl-generated file PPCGenAsmWriter.inc. However, when emitting an Obj file, invalid registers can be emitted given that no check are made in getBinaryCodeFromInstr() from PPCGenMCCodeEmitter.inc. In order to cover all cases I added an assertion for reg operands in LowerPPCMachineInstrToMCInst. The intent is to take advantage of the assertion in getRegisterName more than the value returned by it. If one wants to detect noreg only, we could replace this by a comparison against zero, but this seemed more robust to me.

Thanks,
Samuel

http://reviews.llvm.org/D8384

Files:
  lib/Target/PowerPC/PPCMCInstLower.cpp

Index: lib/Target/PowerPC/PPCMCInstLower.cpp
===================================================================
--- lib/Target/PowerPC/PPCMCInstLower.cpp
+++ lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "PPC.h"
+#include "InstPrinter/PPCInstPrinter.h"
 #include "MCTargetDesc/PPCMCExpr.h"
 #include "PPCSubtarget.h"
 #include "llvm/ADT/SmallString.h"
@@ -184,6 +185,8 @@
       llvm_unreachable("unknown operand type");
     case MachineOperand::MO_Register:
       assert(!MO.getSubReg() && "Subregs should be eliminated!");
+      assert(PPCInstPrinter::getRegisterName(MO.getReg()) &&
+             "A valid register must have a valid name!");
       MCOp = MCOperand::CreateReg(MO.getReg());
       break;
     case MachineOperand::MO_Immediate:

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