[PATCH] try to lowerVectorShuffleAsElementInsertion() for all 256-bit vector sub-types [X86, AVX]

[Sanjay Patel]

Hi craig.topper, chandlerc, andreadb,

I suggested this change in D7898: hoist the lowerVectorShuffleAsElementInsertion() call into lower256BitVectorShuffle().

It improves the v4i64 case although not optimally. This AVX codegen:
   vmovq {{.*#+}} xmm0 = mem[0],zero
   vxorpd %ymm1, %ymm1, %ymm1
   vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]

Becomes:
   vmovsd {{.*#+}} xmm0 = mem[0],zero


Unfortunately, this doesn't completely solve PR22685. There are still at least 2 problems under here:
1. We're not handling v32i8 / v16i16.
2. We're not getting the FP / int domains right for instruction selection.

But since this patch alone appears to do no harm, reduces code duplication, and helps v4i64, I'm submitting this patch ahead of fixing the above.

http://reviews.llvm.org/D8341

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/2012-1-10-buildvector.ll
  test/CodeGen/X86/vector-shuffle-256-v4.ll
  test/CodeGen/X86/vector-shuffle-256-v8.ll

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