[PATCH] R600/SI: don't try min3/max3/med3 with f64
Grigori Goronzy
greg at chown.ath.cx
Fri Mar 13 13:07:51 PDT 2015
There are no opcodes for this. This also adds a test case.
v2: make test more robust
---
lib/Target/R600/SIISelLowering.cpp | 1 +
test/CodeGen/R600/fmax3.f64.ll | 24 ++++++++++++++++++++++++
2 files changed, 25 insertions(+)
create mode 100644 test/CodeGen/R600/fmax3.f64.ll
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp
index af38c94..16d6702 100644
--- a/lib/Target/R600/SIISelLowering.cpp
+++ b/lib/Target/R600/SIISelLowering.cpp
@@ -1617,6 +1617,7 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
case AMDGPUISD::UMAX:
case AMDGPUISD::UMIN: {
if (DCI.getDAGCombineLevel() >= AfterLegalizeDAG &&
+ N->getValueType(0) != MVT::f64 &&
getTargetMachine().getOptLevel() > CodeGenOpt::None)
return performMin3Max3Combine(N, DCI);
break;
diff --git a/test/CodeGen/R600/fmax3.f64.ll b/test/CodeGen/R600/fmax3.f64.ll
new file mode 100644
index 0000000..526d8c4
--- /dev/null
+++ b/test/CodeGen/R600/fmax3.f64.ll
@@ -0,0 +1,24 @@
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+
+declare double @llvm.maxnum.f64(double, double) nounwind readnone
+
+; SI-LABEL: {{^}}test_fmax3_f64:
+; SI-DAG: buffer_load_dwordx2 [[REGA:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0
+; SI-DAG: buffer_load_dwordx2 [[REGB:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:8
+; SI-DAG: buffer_load_dwordx2 [[REGC:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:16
+; SI: v_max_f64 [[REGA]], [[REGA]], [[REGB]]
+; SI: v_max_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[REGA]], [[REGC]]
+; SI: buffer_store_dwordx2 [[RESULT]],
+; SI: s_endpgm
+define void @test_fmax3_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) nounwind {
+ %bptr = getelementptr double, double addrspace(1)* %aptr, i32 1
+ %cptr = getelementptr double, double addrspace(1)* %aptr, i32 2
+ %a = load double, double addrspace(1)* %aptr, align 8
+ %b = load double, double addrspace(1)* %bptr, align 8
+ %c = load double, double addrspace(1)* %cptr, align 8
+ %f0 = call double @llvm.maxnum.f64(double %a, double %b) nounwind readnone
+ %f1 = call double @llvm.maxnum.f64(double %f0, double %c) nounwind readnone
+ store double %f1, double addrspace(1)* %out, align 8
+ ret void
+}
--
1.9.1
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