[PATCH] [X86] Replace (v)palignr intrinsics with generic shuffles (LLVM)

[Simon Pilgrim]

In http://reviews.llvm.org/D8302#139996, @craig.topper wrote:

> I don't see those intrinsics in the IntrinsicsX86.td file. How does that test even work today?


>From what I can tell it hasn't ever worked properly - if you look at the history of the test file the palignr has never been actually CHECK'd for - just the CHECK-LABEL and in reality the compiled function was making a call....

The old lowering code did an OK job at detecting palignr from shuffles - although it didn't take into account the zeroing for imm  > lanesize

I'd be quite happy for this patch just to become a delete of palign-2.ll if everyone else agrees.


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http://reviews.llvm.org/D8302

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