[llvm] r231945 - Add the "vbroadcasti128" instruction back.

Juergen Ributzka juergen at apple.com
Wed Mar 11 12:59:39 PDT 2015


I think the pattern makes sense for this instruction, but it isn’t triggered right now. The shuffle that could trigger it is lowered to two ISD::INSERT_SUBVECTOR and I didn’t see anything in the X86 backend that looks for that pattern to convert it to a X86ISD::VBROADCAST.

> On Mar 11, 2015, at 11:20 AM, Craig Topper <craig.topper at gmail.com> wrote:
> 
> The class you used here uses this pattern, does that make sense for this instruction? Should we have an empty pattern for this?
> 
>  [(set RC:$dst, (VT (X86VBroadcast (ld_frag addr:$src))))]
> 
> On Wed, Mar 11, 2015 at 11:06 AM, Juergen Ributzka <juergen at apple.com <mailto:juergen at apple.com>> wrote:
> Yes. It generates now "vinsertf128	$1, %xmm0, %ymm0, %ymm0”, which doesn’t go through memory anymore.
> 
>> On Mar 11, 2015, at 10:59 AM, Craig Topper <craig.topper at gmail.com <mailto:craig.topper at gmail.com>> wrote:
>> 
>> But when you removed it, it got replace with a shuffle right? What instruction does that shuffle generate in llvm?
>> 
>> On Wed, Mar 11, 2015 at 10:50 AM, Juergen Ributzka <juergen at apple.com <mailto:juergen at apple.com>> wrote:
>> There has never been a shuffle pattern that used this instruction. The only way you would get this instruction was by specifying the intrinsic. I removed the intrinsic in r231182, because we (clang) are not generating it anymore.
>> 
>>> On Mar 11, 2015, at 10:42 AM, Craig Topper <craig.topper at gmail.com <mailto:craig.topper at gmail.com>> wrote:
>>> 
>>> Does the backend not emit this instruction for the corresponding shuffle pattern?
>>> 
>>> On Wed, Mar 11, 2015 at 10:29 AM, Juergen Ributzka <juergen at apple.com <mailto:juergen at apple.com>> wrote:
>>> Author: ributzka
>>> Date: Wed Mar 11 12:29:03 2015
>>> New Revision: 231945
>>> 
>>> URL: http://llvm.org/viewvc/llvm-project?rev=231945&view=rev <http://llvm.org/viewvc/llvm-project?rev=231945&view=rev>
>>> Log:
>>> Add the "vbroadcasti128" instruction back.
>>> 
>>> This is a follow-up to r231182. This adds the "vbroadcasti128" instruction
>>> back, but without the intrinsic mapping. Also add a test to check the
>>> instriction encoding.
>>> 
>>> This is related to rdar://problem/18742778 <>.
>>> 
>>> Modified:
>>>     llvm/trunk/lib/Target/X86/X86InstrSSE.td
>>>     llvm/trunk/test/MC/X86/x86_64-avx-encoding.s
>>> 
>>> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=231945&r1=231944&r2=231945&view=diff <http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=231945&r1=231944&r2=231945&view=diff>
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
>>> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Mar 11 12:29:03 2015
>>> @@ -7833,6 +7833,11 @@ def VBROADCASTSDYrr  : avx2_broadcast_re
>>>                                        int_x86_avx2_vbroadcast_sd_pd_256,
>>>                                        WriteFShuffle256>, VEX_L;
>>> 
>>> +let Predicates = [HasAVX2] in
>>> +def VBROADCASTI128 : avx_broadcast_no_int<0x5A, "vbroadcasti128", VR256,
>>> +                                          i128mem, v4i64, loadv2i64,
>>> +                                          WriteLoad>, VEX_L;
>>> +
>>>  let Predicates = [HasAVX] in
>>>  def : Pat<(int_x86_avx_vbroadcastf128_ps_256 addr:$src),
>>>            (VBROADCASTF128 addr:$src)>;
>>> 
>>> Modified: llvm/trunk/test/MC/X86/x86_64-avx-encoding.s
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-avx-encoding.s?rev=231945&r1=231944&r2=231945&view=diff <http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-avx-encoding.s?rev=231945&r1=231944&r2=231945&view=diff>
>>> ==============================================================================
>>> --- llvm/trunk/test/MC/X86/x86_64-avx-encoding.s (original)
>>> +++ llvm/trunk/test/MC/X86/x86_64-avx-encoding.s Wed Mar 11 12:29:03 2015
>>> @@ -3724,6 +3724,10 @@ vdivpd  -4(%rcx,%rbx,8), %xmm10, %xmm11
>>>  // CHECK: encoding: [0xc4,0x63,0x2d,0x40,0x18,0x03]
>>>            vdpps  $3, (%rax), %ymm10, %ymm11
>>> 
>>> +// CHECK: vbroadcasti128  (%rax), %ymm12
>>> +// CHECK: encoding: [0xc4,0x62,0x7d,0x5a,0x20]
>>> +          vbroadcasti128  (%rax), %ymm12
>>> +
>>>  // CHECK: vbroadcastf128  (%rax), %ymm12
>>>  // CHECK: encoding: [0xc4,0x62,0x7d,0x1a,0x20]
>>>            vbroadcastf128  (%rax), %ymm12
>>> 
>>> 
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>>> 
>>> 
>>> 
>>> -- 
>>> ~Craig
>> 
>> 
>> 
>> 
>> -- 
>> ~Craig
> 
> 
> 
> 
> -- 
> ~Craig

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