[PATCH] [PATCH v4] [PowerPC] Add Hardware Transaction Memory builtins support

[Adhemerval Zanella]

Hi hfinkel, kbarton, nemanjai, wschmidt,

This patch adds Hardware Transaction Memory (HTM) support supported by
ISA 2.07 (POWER8).  The intrinsic support is based on GCC one [1], but
currently only the 'PowerPC HTM Low Level Built-in Function' are
implemented.

The HTM instructions follows the RC ones and the transaction initiation
result is set on RC0 (with exception of tcheck).  Currently approach is
to create a register copy from CR0 to GPR and comapring.  Although this
is suboptimal, since the branch could be taken directly by comparing
the CR0 value, it generates code correctly on both test and branch and
just return value.  A possible future optimization could be elimitate
the MFCR instruction to branch directly.

The HTM usage requires a recently newer kernel with PPC HTM enabled.
Tested on powerpc64 and powerpc64le.

This is send along a clang patch to enabled the builtins and option
switch.

[1] https://gcc.gnu.org/onlinedocs/gcc/PowerPC-Hardware-Transactional-Memory-Built-in-Functions.html

--

Changes from previous version (v3):

* Transaction -> Transactional on HTM description.

http://reviews.llvm.org/D8247

Files:
  include/llvm/IR/IntrinsicsPowerPC.td
  lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
  lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
  lib/Target/PowerPC/PPC.td
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstr64Bit.td
  lib/Target/PowerPC/PPCInstrFormats.td
  lib/Target/PowerPC/PPCInstrHTM.td
  lib/Target/PowerPC/PPCInstrInfo.cpp
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCRegisterInfo.cpp
  lib/Target/PowerPC/PPCRegisterInfo.h
  lib/Target/PowerPC/PPCRegisterInfo.td
  lib/Target/PowerPC/PPCSubtarget.cpp
  lib/Target/PowerPC/PPCSubtarget.h
  test/CodeGen/PowerPC/htm.ll
  test/MC/PowerPC/htm.s

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