[PATCH] Add support for part-word atomics for PPC

[Nemanja Ivanovic]

Removed the SD nodes and patterns for the atomic instructions. These instructions are never emitted directly from a Selection DAG since there is a very close relationship between the load and the store. As a result, they are only emitted from the atomic Pseudo instructions using a custom inserter. It is therefore not necessary to maintain patterns and SD nodes for the new or existing ones.


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D8090

Files:
  lib/Target/PowerPC/PPC.td
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCISelLowering.h
  lib/Target/PowerPC/PPCInstr64Bit.td
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCSubtarget.cpp
  lib/Target/PowerPC/PPCSubtarget.h
  test/CodeGen/PowerPC/atomic-2.ll
  test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
  test/MC/PowerPC/ppc64-encoding-bookII.s

EMAIL PREFERENCES
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