[llvm] r231684 - R600/SI: Move gds operand to the end of operand list
Tom Stellard
thomas.stellard at amd.com
Mon Mar 9 11:49:55 PDT 2015
Author: tstellar
Date: Mon Mar 9 13:49:54 2015
New Revision: 231684
URL: http://llvm.org/viewvc/llvm-project?rev=231684&view=rev
Log:
R600/SI: Move gds operand to the end of operand list
Also print it in the assembly string.
Modified:
llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h
llvm/trunk/lib/Target/R600/SIInstrInfo.td
llvm/trunk/lib/Target/R600/SIInstructions.td
llvm/trunk/lib/Target/R600/SILoadStoreOptimizer.cpp
Modified: llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp?rev=231684&r1=231683&r2=231684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp Mon Mar 9 13:49:54 2015
@@ -99,6 +99,12 @@ void AMDGPUInstPrinter::printDSOffset1(c
printU8ImmDecOperand(MI, OpNo, O);
}
+void AMDGPUInstPrinter::printGDS(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
+ if (MI->getOperand(OpNo).getImm())
+ O << " gds";
+}
+
void AMDGPUInstPrinter::printGLC(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (MI->getOperand(OpNo).getImm())
Modified: llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h?rev=231684&r1=231683&r2=231684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h (original)
+++ llvm/trunk/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h Mon Mar 9 13:49:54 2015
@@ -44,6 +44,7 @@ private:
void printDSOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printDSOffset0(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printDSOffset1(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+ void printGDS(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printGLC(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printSLC(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printTFE(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.td?rev=231684&r1=231683&r2=231684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.td Mon Mar 9 13:49:54 2015
@@ -264,6 +264,9 @@ def ds_offset0 : Operand<i8> {
def ds_offset1 : Operand<i8> {
let PrintMethod = "printDSOffset1";
}
+def gds : Operand <i1> {
+ let PrintMethod = "printGDS";
+}
def glc : Operand <i1> {
let PrintMethod = "printGLC";
}
@@ -1503,8 +1506,8 @@ class DS_Off16_Real_vi <bits<8> op, stri
multiclass DS_1A_RET <bits<8> op, string opName, RegisterClass rc,
dag outs = (outs rc:$vdst),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, ds_offset:$offset, M0Reg:$m0),
- string asm = opName#" $vdst, $addr"#"$offset"> {
+ dag ins = (ins VGPR_32:$addr, ds_offset:$offset, gds:$gds, M0Reg:$m0),
+ string asm = opName#" $vdst, $addr"#"$offset$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>;
@@ -1516,9 +1519,9 @@ multiclass DS_1A_RET <bits<8> op, string
multiclass DS_1A_Off8_RET <bits<8> op, string opName, RegisterClass rc,
dag outs = (outs rc:$vdst),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, ds_offset0:$offset0,
- ds_offset1:$offset1, M0Reg:$m0),
- string asm = opName#" $vdst, $addr"#"$offset0"#"$offset1"> {
+ dag ins = (ins VGPR_32:$addr, ds_offset0:$offset0, ds_offset1:$offset1,
+ gds:$gds, M0Reg:$m0),
+ string asm = opName#" $vdst, $addr"#"$offset0"#"$offset1$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>;
@@ -1530,9 +1533,9 @@ multiclass DS_1A_Off8_RET <bits<8> op, s
multiclass DS_1A1D_NORET <bits<8> op, string opName, RegisterClass rc,
dag outs = (outs),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, ds_offset:$offset,
+ dag ins = (ins VGPR_32:$addr, rc:$data0, ds_offset:$offset, gds:$gds,
M0Reg:$m0),
- string asm = opName#" $addr, $data0"#"$offset"> {
+ string asm = opName#" $addr, $data0"#"$offset$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>,
AtomicNoRet<opName, 0>;
@@ -1545,9 +1548,9 @@ multiclass DS_1A1D_NORET <bits<8> op, st
multiclass DS_1A1D_Off8_NORET <bits<8> op, string opName, RegisterClass rc,
dag outs = (outs),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, rc:$data1,
- ds_offset0:$offset0, ds_offset1:$offset1, M0Reg:$m0),
- string asm = opName#" $addr, $data0, $data1"#"$offset0"#"$offset1"> {
+ dag ins = (ins VGPR_32:$addr, rc:$data0, rc:$data1,
+ ds_offset0:$offset0, ds_offset1:$offset1, gds:$gds, M0Reg:$m0),
+ string asm = opName#" $addr, $data0, $data1"#"$offset0"#"$offset1"#"$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>;
@@ -1560,9 +1563,9 @@ multiclass DS_1A1D_Off8_NORET <bits<8> o
multiclass DS_1A1D_RET <bits<8> op, string opName, RegisterClass rc,
string noRetOp = "",
dag outs = (outs rc:$vdst),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, ds_offset:$offset,
+ dag ins = (ins VGPR_32:$addr, rc:$data0, ds_offset:$offset, gds:$gds,
M0Reg:$m0),
- string asm = opName#" $vdst, $addr, $data0"#"$offset"> {
+ string asm = opName#" $vdst, $addr, $data0"#"$offset$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>,
AtomicNoRet<noRetOp, 1>;
@@ -1576,7 +1579,7 @@ multiclass DS_1A1D_RET <bits<8> op, stri
multiclass DS_1A2D_RET_m <bits<8> op, string opName, RegisterClass rc,
string noRetOp = "", dag ins,
dag outs = (outs rc:$vdst),
- string asm = opName#" $vdst, $addr, $data0, $data1"#"$offset"> {
+ string asm = opName#" $vdst, $addr, $data0, $data1"#"$offset"#"$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>,
AtomicNoRet<noRetOp, 1>;
@@ -1588,16 +1591,16 @@ multiclass DS_1A2D_RET_m <bits<8> op, st
multiclass DS_1A2D_RET <bits<8> op, string asm, RegisterClass rc,
string noRetOp = "", RegisterClass src = rc> :
DS_1A2D_RET_m <op, asm, rc, noRetOp,
- (ins i1imm:$gds, VGPR_32:$addr, src:$data0, src:$data1,
- ds_offset:$offset, M0Reg:$m0)
+ (ins VGPR_32:$addr, src:$data0, src:$data1,
+ ds_offset:$offset, gds:$gds, M0Reg:$m0)
>;
multiclass DS_1A2D_NORET <bits<8> op, string opName, RegisterClass rc,
string noRetOp = opName,
dag outs = (outs),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, rc:$data1,
- ds_offset:$offset, M0Reg:$m0),
- string asm = opName#" $addr, $data0, $data1"#"$offset"> {
+ dag ins = (ins VGPR_32:$addr, rc:$data0, rc:$data1,
+ ds_offset:$offset, gds:$gds, M0Reg:$m0),
+ string asm = opName#" $addr, $data0, $data1"#"$offset"#"$gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>,
AtomicNoRet<noRetOp, 0>;
@@ -1610,8 +1613,8 @@ multiclass DS_1A2D_NORET <bits<8> op, st
multiclass DS_0A_RET <bits<8> op, string opName,
dag outs = (outs VGPR_32:$vdst),
- dag ins = (ins i1imm:$gds, ds_offset:$offset, M0Reg:$m0),
- string asm = opName#" $vdst $offset"> {
+ dag ins = (ins ds_offset:$offset, gds:$gds, M0Reg:$m0),
+ string asm = opName#" $vdst"#"$offset"#"$gds"> {
let mayLoad = 1, mayStore = 1 in {
def "" : DS_Pseudo <opName, outs, ins, []>;
@@ -1626,7 +1629,7 @@ multiclass DS_0A_RET <bits<8> op, string
multiclass DS_1A_RET_GDS <bits<8> op, string opName,
dag outs = (outs VGPR_32:$vdst),
dag ins = (ins VGPR_32:$addr, ds_offset:$offset, M0Reg:$m0),
- string asm = opName#" $vdst, $addr $offset"> {
+ string asm = opName#" $vdst, $addr"#"$offset gds"> {
def "" : DS_Pseudo <opName, outs, ins, []>;
@@ -1651,8 +1654,8 @@ multiclass DS_1A_GDS <bits<8> op, string
multiclass DS_1A <bits<8> op, string opName,
dag outs = (outs),
- dag ins = (ins i1imm:$gds, VGPR_32:$addr, ds_offset:$offset, M0Reg:$m0),
- string asm = opName#" $addr $offset"> {
+ dag ins = (ins VGPR_32:$addr, ds_offset:$offset, M0Reg:$m0, gds:$gds),
+ string asm = opName#" $addr"#"$offset"#"$gds"> {
let mayLoad = 1, mayStore = 1 in {
def "" : DS_Pseudo <opName, outs, ins, []>;
Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=231684&r1=231683&r2=231684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstructions.td Mon Mar 9 13:49:54 2015
@@ -2846,7 +2846,7 @@ def : ROTRPattern <V_ALIGNBIT_B32>;
class DSReadPat <DS inst, ValueType vt, PatFrag frag> : Pat <
(vt (frag (DS1Addr1Offset i32:$ptr, i32:$offset))),
- (inst (i1 0), $ptr, (as_i16imm $offset), (S_MOV_B32 -1))
+ (inst $ptr, (as_i16imm $offset), (i1 0), (S_MOV_B32 -1))
>;
def : DSReadPat <DS_READ_I8, i32, sextloadi8_local>;
@@ -2864,12 +2864,12 @@ def : DSReadPat <DS_READ_B64, v2i32, loc
def : Pat <
(v2i32 (local_load (DS64Bit4ByteAligned i32:$ptr, i8:$offset0,
i8:$offset1))),
- (DS_READ2_B32 (i1 0), $ptr, $offset0, $offset1, (S_MOV_B32 -1))
+ (DS_READ2_B32 $ptr, $offset0, $offset1, (i1 0), (S_MOV_B32 -1))
>;
class DSWritePat <DS inst, ValueType vt, PatFrag frag> : Pat <
(frag vt:$value, (DS1Addr1Offset i32:$ptr, i32:$offset)),
- (inst (i1 0), $ptr, $value, (as_i16imm $offset), (S_MOV_B32 -1))
+ (inst $ptr, $value, (as_i16imm $offset), (i1 0), (S_MOV_B32 -1))
>;
def : DSWritePat <DS_WRITE_B8, i32, truncstorei8_local>;
@@ -2884,14 +2884,14 @@ def : DSWritePat <DS_WRITE_B64, v2i32, l
def : Pat <
(local_store v2i32:$value, (DS64Bit4ByteAligned i32:$ptr, i8:$offset0,
i8:$offset1)),
- (DS_WRITE2_B32 (i1 0), $ptr, (EXTRACT_SUBREG $value, sub0),
- (EXTRACT_SUBREG $value, sub1), $offset0, $offset1,
- (S_MOV_B32 -1))
+ (DS_WRITE2_B32 $ptr, (EXTRACT_SUBREG $value, sub0),
+ (EXTRACT_SUBREG $value, sub1), $offset0, $offset1,
+ (i1 0), (S_MOV_B32 -1))
>;
class DSAtomicRetPat<DS inst, ValueType vt, PatFrag frag> : Pat <
(frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$value),
- (inst (i1 0), $ptr, $value, (as_i16imm $offset), (S_MOV_B32 -1))
+ (inst $ptr, $value, (as_i16imm $offset), (i1 0), (S_MOV_B32 -1))
>;
// Special case of DSAtomicRetPat for add / sub 1 -> inc / dec
@@ -2907,13 +2907,13 @@ class DSAtomicRetPat<DS inst, ValueType
class DSAtomicIncRetPat<DS inst, ValueType vt,
Instruction LoadImm, PatFrag frag> : Pat <
(frag (DS1Addr1Offset i32:$ptr, i32:$offset), (vt 1)),
- (inst (i1 0), $ptr, (LoadImm (vt -1)), (as_i16imm $offset), (S_MOV_B32 -1))
+ (inst $ptr, (LoadImm (vt -1)), (as_i16imm $offset), (i1 0), (S_MOV_B32 -1))
>;
class DSAtomicCmpXChg <DS inst, ValueType vt, PatFrag frag> : Pat <
(frag (DS1Addr1Offset i32:$ptr, i32:$offset), vt:$cmp, vt:$swap),
- (inst (i1 0), $ptr, $cmp, $swap, (as_i16imm $offset), (S_MOV_B32 -1))
+ (inst $ptr, $cmp, $swap, (as_i16imm $offset), (i1 0), (S_MOV_B32 -1))
>;
Modified: llvm/trunk/lib/Target/R600/SILoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SILoadStoreOptimizer.cpp?rev=231684&r1=231683&r2=231684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SILoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/R600/SILoadStoreOptimizer.cpp Mon Mar 9 13:49:54 2015
@@ -249,10 +249,10 @@ MachineBasicBlock::iterator SILoadStore
DebugLoc DL = I->getDebugLoc();
MachineInstrBuilder Read2
= BuildMI(*MBB, I, DL, Read2Desc, DestReg)
- .addImm(0) // gds
.addOperand(*AddrReg) // addr
.addImm(NewOffset0) // offset0
.addImm(NewOffset1) // offset1
+ .addImm(0) // gds
.addOperand(*M0Reg) // M0
.addMemOperand(*I->memoperands_begin())
.addMemOperand(*Paired->memoperands_begin());
@@ -332,12 +332,12 @@ MachineBasicBlock::iterator SILoadStoreO
MachineInstrBuilder Write2
= BuildMI(*MBB, I, DL, Write2Desc)
- .addImm(0) // gds
.addOperand(*Addr) // addr
.addOperand(*Data0) // data0
.addOperand(*Data1) // data1
.addImm(NewOffset0) // offset0
.addImm(NewOffset1) // offset1
+ .addImm(0) // gds
.addOperand(*M0Reg) // m0
.addMemOperand(*I->memoperands_begin())
.addMemOperand(*Paired->memoperands_begin());
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