[PATCH] CodeGenPrepare: Avoid and/or i1 in select conditions.

[hfinkel at anl.gov]

REPOSITORY
  rL LLVM

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Comment at: include/llvm/Target/TargetLowering.h:1095
@@ +1094,3 @@
+    // If SELECTs are expensive then we should not do this.
+    return !isSelectExpensive();
+  }
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I think it makes more sense to make this default to:
  !hasMultipleConditionRegisters()

because if a target has multiple condition registers, then it probably has operations on those registers.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4714
@@ +4713,3 @@
+  const SDNode *Node = Value.getNode();
+  for (auto I = Node->use_begin(), E = Node->use_end(); I != E; ++I) {
+    const SDUse &Use = I.getUse();
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Range-based for?

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Comment at: lib/Target/PowerPC/PPCISelLowering.h:624
@@ +623,3 @@
+    bool shouldNormalizeToSelectSequence() const override {
+      return false;
+    }
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This needs to default to !Subtarget.useCRBits() (so you might need to move the implementation into the PPCISelLowering.cpp).

Better yet, if you use hasMultipleConditionRegisters() for the default implementation (which I think you should), then you don't need this at all.

http://reviews.llvm.org/D7622

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