[llvm] r230760 - [mips][microMIPS] Change register class for GP register
Zoran Jovanovic
zoran.jovanovic at imgtec.com
Fri Feb 27 07:03:50 PST 2015
Author: zjovanovic
Date: Fri Feb 27 09:03:50 2015
New Revision: 230760
URL: http://llvm.org/viewvc/llvm-project?rev=230760&view=rev
Log:
[mips][microMIPS] Change register class for GP register
Differential Revision: http://reviews.llvm.org/D7934
Added:
llvm/trunk/test/CodeGen/Mips/micromips-gp-rc.ll
Modified:
llvm/trunk/lib/Target/Mips/MipsMachineFunction.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsMachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMachineFunction.cpp?rev=230760&r1=230759&r2=230760&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsMachineFunction.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsMachineFunction.cpp Fri Feb 27 09:03:50 2015
@@ -79,14 +79,19 @@ unsigned MipsFunctionInfo::getGlobalBase
if (GlobalBaseReg)
return GlobalBaseReg;
+ MipsSubtarget const &STI =
+ static_cast<const MipsSubtarget &>(MF.getSubtarget());
+
const TargetRegisterClass *RC =
- static_cast<const MipsSubtarget &>(MF.getSubtarget()).inMips16Mode()
+ STI.inMips16Mode()
? &Mips::CPU16RegsRegClass
- : static_cast<const MipsTargetMachine &>(MF.getTarget())
- .getABI()
- .IsN64()
- ? &Mips::GPR64RegClass
- : &Mips::GPR32RegClass;
+ : STI.inMicroMipsMode()
+ ? &Mips::GPRMM16RegClass
+ : static_cast<const MipsTargetMachine &>(MF.getTarget())
+ .getABI()
+ .IsN64()
+ ? &Mips::GPR64RegClass
+ : &Mips::GPR32RegClass;
return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
}
Added: llvm/trunk/test/CodeGen/Mips/micromips-gp-rc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/micromips-gp-rc.ll?rev=230760&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/micromips-gp-rc.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/micromips-gp-rc.ll Fri Feb 27 09:03:50 2015
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
+; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
+
+ at g = external global i32
+
+; Function Attrs: noreturn nounwind
+define void @foo() #0 {
+entry:
+ %0 = load i32* @g, align 4
+ tail call void @exit(i32 signext %0)
+ unreachable
+}
+
+; Function Attrs: noreturn
+declare void @exit(i32 signext)
+
+; CHECK: move $gp, ${{[0-9]+}}
+
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