[llvm] r230660 - [InstCombine/PowerPC] Convert aligned QPX load/store intrinsics into loads/stores
Hal Finkel
hfinkel at anl.gov
Thu Feb 26 10:56:03 PST 2015
Author: hfinkel
Date: Thu Feb 26 12:56:03 2015
New Revision: 230660
URL: http://llvm.org/viewvc/llvm-project?rev=230660&view=rev
Log:
[InstCombine/PowerPC] Convert aligned QPX load/store intrinsics into loads/stores
InstCombine has long had logic to convert aligned Altivec load/store intrinsics
into regular loads and stores. This mirrors that functionality for QPX vector
load/store intrinsics.
Added:
llvm/trunk/test/Transforms/InstCombine/aligned-qpx.ll
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=230660&r1=230659&r2=230660&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Thu Feb 26 12:56:03 2015
@@ -576,6 +576,44 @@ Instruction *InstCombiner::visitCallInst
Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
return new StoreInst(II->getArgOperand(0), Ptr, false, 1);
}
+ case Intrinsic::ppc_qpx_qvlfs:
+ // Turn PPC QPX qvlfs -> load if the pointer is known aligned.
+ if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, AC, II, DT) >=
+ 16) {
+ Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
+ PointerType::getUnqual(II->getType()));
+ return new LoadInst(Ptr);
+ }
+ break;
+ case Intrinsic::ppc_qpx_qvlfd:
+ // Turn PPC QPX qvlfd -> load if the pointer is known aligned.
+ if (getOrEnforceKnownAlignment(II->getArgOperand(0), 32, DL, AC, II, DT) >=
+ 32) {
+ Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
+ PointerType::getUnqual(II->getType()));
+ return new LoadInst(Ptr);
+ }
+ break;
+ case Intrinsic::ppc_qpx_qvstfs:
+ // Turn PPC QPX qvstfs -> store if the pointer is known aligned.
+ if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, DL, AC, II, DT) >=
+ 16) {
+ Type *OpPtrTy =
+ PointerType::getUnqual(II->getArgOperand(0)->getType());
+ Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
+ return new StoreInst(II->getArgOperand(0), Ptr);
+ }
+ break;
+ case Intrinsic::ppc_qpx_qvstfd:
+ // Turn PPC QPX qvstfd -> store if the pointer is known aligned.
+ if (getOrEnforceKnownAlignment(II->getArgOperand(1), 32, DL, AC, II, DT) >=
+ 32) {
+ Type *OpPtrTy =
+ PointerType::getUnqual(II->getArgOperand(0)->getType());
+ Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
+ return new StoreInst(II->getArgOperand(0), Ptr);
+ }
+ break;
case Intrinsic::x86_sse_storeu_ps:
case Intrinsic::x86_sse2_storeu_pd:
case Intrinsic::x86_sse2_storeu_dq:
Added: llvm/trunk/test/Transforms/InstCombine/aligned-qpx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/aligned-qpx.ll?rev=230660&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/aligned-qpx.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/aligned-qpx.ll Thu Feb 26 12:56:03 2015
@@ -0,0 +1,162 @@
+; RUN: opt -S -instcombine < %s | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+declare <4 x double> @llvm.ppc.qpx.qvlfs(i8*) #1
+
+define <4 x double> @test1(<4 x float>* %h) #0 {
+entry:
+ %h1 = getelementptr <4 x float>* %h, i64 1
+ %hv = bitcast <4 x float>* %h1 to i8*
+ %vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
+
+; CHECK-LABEL: @test1
+; CHECK: @llvm.ppc.qpx.qvlfs
+; CHECK: ret <4 x double>
+
+ %v0 = load <4 x float>* %h, align 8
+ %v0e = fpext <4 x float> %v0 to <4 x double>
+ %a = fadd <4 x double> %v0e, %vl
+ ret <4 x double> %a
+}
+
+define <4 x double> @test1a(<4 x float>* align 16 %h) #0 {
+entry:
+ %h1 = getelementptr <4 x float>* %h, i64 1
+ %hv = bitcast <4 x float>* %h1 to i8*
+ %vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
+
+; CHECK-LABEL: @test1a
+; CHECK-NOT: @llvm.ppc.qpx.qvlfs
+; CHECK: ret <4 x double>
+
+ %v0 = load <4 x float>* %h, align 8
+ %v0e = fpext <4 x float> %v0 to <4 x double>
+ %a = fadd <4 x double> %v0e, %vl
+ ret <4 x double> %a
+}
+
+declare void @llvm.ppc.qpx.qvstfs(<4 x double>, i8*) #0
+
+define <4 x float> @test2(<4 x float>* %h, <4 x double> %d) #0 {
+entry:
+ %h1 = getelementptr <4 x float>* %h, i64 1
+ %hv = bitcast <4 x float>* %h1 to i8*
+ call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
+
+ %v0 = load <4 x float>* %h, align 8
+ ret <4 x float> %v0
+
+; CHECK-LABEL: @test2
+; CHECK: @llvm.ppc.qpx.qvstfs
+; CHECK: ret <4 x float>
+}
+
+define <4 x float> @test2a(<4 x float>* align 16 %h, <4 x double> %d) #0 {
+entry:
+ %h1 = getelementptr <4 x float>* %h, i64 1
+ %hv = bitcast <4 x float>* %h1 to i8*
+ call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
+
+ %v0 = load <4 x float>* %h, align 8
+ ret <4 x float> %v0
+
+; CHECK-LABEL: @test2
+; CHECK-NOT: @llvm.ppc.qpx.qvstfs
+; CHECK: ret <4 x float>
+}
+
+declare <4 x double> @llvm.ppc.qpx.qvlfd(i8*) #1
+
+define <4 x double> @test1l(<4 x double>* %h) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ %vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
+
+; CHECK-LABEL: @test1l
+; CHECK: @llvm.ppc.qpx.qvlfd
+; CHECK: ret <4 x double>
+
+ %v0 = load <4 x double>* %h, align 8
+ %a = fadd <4 x double> %v0, %vl
+ ret <4 x double> %a
+}
+
+define <4 x double> @test1ln(<4 x double>* align 16 %h) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ %vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
+
+; CHECK-LABEL: @test1ln
+; CHECK: @llvm.ppc.qpx.qvlfd
+; CHECK: ret <4 x double>
+
+ %v0 = load <4 x double>* %h, align 8
+ %a = fadd <4 x double> %v0, %vl
+ ret <4 x double> %a
+}
+
+define <4 x double> @test1la(<4 x double>* align 32 %h) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ %vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
+
+; CHECK-LABEL: @test1la
+; CHECK-NOT: @llvm.ppc.qpx.qvlfd
+; CHECK: ret <4 x double>
+
+ %v0 = load <4 x double>* %h, align 8
+ %a = fadd <4 x double> %v0, %vl
+ ret <4 x double> %a
+}
+
+declare void @llvm.ppc.qpx.qvstfd(<4 x double>, i8*) #0
+
+define <4 x double> @test2l(<4 x double>* %h, <4 x double> %d) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
+
+ %v0 = load <4 x double>* %h, align 8
+ ret <4 x double> %v0
+
+; CHECK-LABEL: @test2l
+; CHECK: @llvm.ppc.qpx.qvstfd
+; CHECK: ret <4 x double>
+}
+
+define <4 x double> @test2ln(<4 x double>* align 16 %h, <4 x double> %d) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
+
+ %v0 = load <4 x double>* %h, align 8
+ ret <4 x double> %v0
+
+; CHECK-LABEL: @test2ln
+; CHECK: @llvm.ppc.qpx.qvstfd
+; CHECK: ret <4 x double>
+}
+
+define <4 x double> @test2la(<4 x double>* align 32 %h, <4 x double> %d) #0 {
+entry:
+ %h1 = getelementptr <4 x double>* %h, i64 1
+ %hv = bitcast <4 x double>* %h1 to i8*
+ call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
+
+ %v0 = load <4 x double>* %h, align 8
+ ret <4 x double> %v0
+
+; CHECK-LABEL: @test2l
+; CHECK-NOT: @llvm.ppc.qpx.qvstfd
+; CHECK: ret <4 x double>
+}
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind readonly }
+
More information about the llvm-commits
mailing list