[llvm] r230517 - AArch64: Add debug message for large shift constants.

[Matthias Braun]

Author: matze
Date: Wed Feb 25 12:03:50 2015
New Revision: 230517

URL: http://llvm.org/viewvc/llvm-project?rev=230517&view=rev
Log:
AArch64: Add debug message for large shift constants.

As requested in code review.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp?rev=230517&r1=230516&r2=230517&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Wed Feb 25 12:03:50 2015
@@ -1399,8 +1399,11 @@ static bool isBitfieldExtractOpFromAnd(S
 
   // Bail out on large immediates. This happens when no proper
   // combining/constant folding was performed.
-  if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits()))
+  if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) {
+    DEBUG((dbgs() << N
+           << ": Found large shift immediate, this should not happen\n"));
     return false;
+  }
 
   LSB = Srl_imm;
   MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm)
@@ -1506,8 +1509,11 @@ static bool isBitfieldExtractOpFromShr(S
 
   // Missing combines/constant folding may have left us with strange
   // constants.
-  if (Shl_imm >= VT.getSizeInBits())
+  if (Shl_imm >= VT.getSizeInBits()) {
+    DEBUG((dbgs() << N
+           << ": Found large shift immediate, this should not happen\n"));
     return false;
+  }
 
   uint64_t Srl_imm = 0;
   if (!isIntImmediate(N->getOperand(1), Srl_imm))