[PATCH] [X86] Teach how to custom lower double-to-half conversions under fast-math.

Andrea Di Biagio Andrea_DiBiagio at sn.scee.net
Mon Feb 23 12:02:42 PST 2015


In http://reviews.llvm.org/D7832#128423, @ab wrote:

> In http://reviews.llvm.org/D7832#128399, @andreadb wrote:
>
> > Hi Ahmed,
> >
> > Thanks for the review!
> >  Here is a updated patch. As you suggested, I moved the expansion of FP_TO_FP16 into the target independed dag legalizer.
>
>
> If f16->f32 isn't legal as well, we just turned one libcall into two, no?


Right, it doesn't make sense to expand that node if f16->f32 is not legal.
We would still generate a single libcall (for the f16->f32 conversion). However, we would get a extra (v)cvtsd2ss for the double-half conversion.
I will add a check to make sure that the f16->f32 is 'legalOrCustom' before attempting to expand the double-half conversion.

I will upload a new version patch.

> 

> 

> > I also updated the test adding extra CHECK lines for the 'long double-to-float' conversion.

> 

> > 

> 

> > The 'long double-to-float conversion' is currently implemented by the sequence: fldt+fstps+movss.

> 

> >  Basically, the long double in input to the function is firstly pushed onto the top of the x87 FPU register stack, and then 'popped' from the FPU stack onto the stack again. Finally, it is loaded as a float using a zero extending movss. The code sequence looks a bit redundant but it works :-)

> 

> 

> I expected something like that, thanks for adding it!

> 

> -Ahmed

> 

> > Please let me know what you think.

> 

> > 

> 

> > Thanks!

> 

> > -Andrea

> 





http://reviews.llvm.org/D7832

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