[llvm] r229751 - R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C

[Marek Olsak]

Author: mareko
Date: Wed Feb 18 16:12:41 2015
New Revision: 229751

URL: http://llvm.org/viewvc/llvm-project?rev=229751&view=rev
Log:
R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C

Modified:
    llvm/trunk/lib/Target/R600/SIInstrInfo.cpp

Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.cpp?rev=229751&r1=229750&r2=229751&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.cpp Wed Feb 18 16:12:41 2015
@@ -1151,6 +1151,8 @@ bool SIInstrInfo::verifyInstruction(cons
       return false;
     }
 
+    int RegClass = Desc.OpInfo[i].RegClass;
+
     switch (Desc.OpInfo[i].OperandType) {
     case MCOI::OPERAND_REGISTER:
       if (MI->getOperand(i).isImm()) {
@@ -1161,13 +1163,10 @@ bool SIInstrInfo::verifyInstruction(cons
     case AMDGPU::OPERAND_REG_IMM32:
       break;
     case AMDGPU::OPERAND_REG_INLINE_C:
-      if (MI->getOperand(i).isImm()) {
-        int RegClass = Desc.OpInfo[i].RegClass;
-        const TargetRegisterClass *RC = RI.getRegClass(RegClass);
-        if (!isInlineConstant(MI->getOperand(i), RC->getSize())) {
-          ErrInfo = "Illegal immediate value for operand.";
-          return false;
-        }
+      if (isLiteralConstant(MI->getOperand(i),
+                            RI.getRegClass(RegClass)->getSize())) {
+        ErrInfo = "Illegal immediate value for operand.";
+        return false;
       }
       break;
     case MCOI::OPERAND_IMMEDIATE:
@@ -1186,7 +1185,6 @@ bool SIInstrInfo::verifyInstruction(cons
     if (!MI->getOperand(i).isReg())
       continue;
 
-    int RegClass = Desc.OpInfo[i].RegClass;
     if (RegClass != -1) {
       unsigned Reg = MI->getOperand(i).getReg();
       if (TargetRegisterInfo::isVirtualRegister(Reg))