[llvm] r229702 - [mips][microMIPS] Implement JALX instruction

Jozef Kolek jozef.kolek at imgtec.com
Wed Feb 18 09:15:48 PST 2015


Author: jkolek
Date: Wed Feb 18 11:15:48 2015
New Revision: 229702

URL: http://llvm.org/viewvc/llvm-project?rev=229702&view=rev
Log:
[mips][microMIPS] Implement JALX instruction

Differential Revision: http://reviews.llvm.org/D5047

Modified:
    llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
    llvm/trunk/test/MC/Mips/micromips-jump-instructions.s

Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=229702&r1=229701&r2=229702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Wed Feb 18 11:15:48 2015
@@ -788,6 +788,7 @@ let DecoderNamespace = "MicroMips", Pred
     def J_MM        : MMRel, JumpFJ<jmptarget_mm, "j", br, bb, "j">,
                       J_FM_MM<0x35>;
     def JAL_MM      : MMRel, JumpLink<"jal", calltarget_mm>, J_FM_MM<0x3d>;
+    def JALX_MM     : MMRel, JumpLink<"jalx", calltarget>, J_FM_MM<0x3c>;
   }
   def JR_MM   : MMRel, IndirectBranch<"jr", GPR32Opnd>, JR_FM_MM<0x3c>;
   def JALR_MM : JumpLinkReg<"jalr", GPR32Opnd>, JALR_FM_MM<0x03c>;

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=229702&r1=229701&r2=229702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Wed Feb 18 11:15:48 2015
@@ -1314,8 +1314,8 @@ let AdditionalPredicates = [NotInMicroMi
   def JALRPseudo : JumpLinkRegPseudo<GPR32Opnd, JALR, RA>;
 }
 
-// FIXME: JALX really requires either MIPS16 or microMIPS in addition to MIPS32.
-def JALX  : JumpLink<"jalx", calltarget>, FJ<0x1D>, ISA_MIPS32_NOT_32R6_64R6;
+def JALX : MMRel, JumpLink<"jalx", calltarget>, FJ<0x1D>,
+           ISA_MIPS32_NOT_32R6_64R6;
 def BGEZAL : MMRel, BGEZAL_FT<"bgezal", brtarget, GPR32Opnd>, BGEZAL_FM<0x11>,
              ISA_MIPS1_NOT_32R6_64R6;
 def BGEZALL : MMRel, BGEZAL_FT<"bgezall", brtarget, GPR32Opnd, 0>,

Modified: llvm/trunk/test/MC/Mips/micromips-jump-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-jump-instructions.s?rev=229702&r1=229701&r2=229702&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-jump-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-jump-instructions.s Wed Feb 18 11:15:48 2015
@@ -19,6 +19,8 @@
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EL: jr $7       # encoding: [0x07,0x00,0x3c,0x0f]
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: jalx 1328   # encoding: [0x00,0xf0,0x4c,0x01]
+# CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EL: jals 1328         # encoding: [0x00,0x74,0x98,0x02]
 # CHECK-EL: nop               # encoding: [0x00,0x0c]
 # CHECK-EL: jalrs $ra, $6     # encoding: [0xe6,0x03,0x3c,0x4f]
@@ -40,6 +42,8 @@
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EB: jr $7       # encoding: [0x00,0x07,0x0f,0x3c]
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: jalx 1328   # encoding: [0xf0,0x00,0x01,0x4c]
+# CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EB: jals 1328         # encoding: [0x74,0x00,0x02,0x98]
 # CHECK-EB: nop               # encoding: [0x0c,0x00]
 # CHECK-EB: jalrs $ra, $6     # encoding: [0x03,0xe6,0x4f,0x3c]
@@ -54,6 +58,7 @@
      jalr $ra, $6
      jr $7
      j $7
+     jalx 1328
      jals 1328
      jalrs $ra, $6
      jal $25





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