[PATCH] [X86][FastISel] Teach how to select float-half conversion intrinsics.

[Quentin Colombet]

================
Comment at: lib/Target/X86/X86FastISel.cpp:2149
@@ +2148,3 @@
+    if (IsFloatToHalf && !Op->getType()->isFloatTy())
+      return false;
+
----------------
Shouldn’t we have some checks that the type is not double for any cases?

================
Comment at: lib/Target/X86/X86FastISel.cpp:2162
@@ +2161,3 @@
+    unsigned ResultReg = createResultReg(RC);
+    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+            TII.get(TargetOpcode::COPY), ResultReg).addReg(InputReg);
----------------
I think it would be cleaner to generate:
res = implicit_def
res2 = insert_subreg res, inputreg, 0

A copy with mismatching size sounds wrong to me.

================
Comment at: lib/Target/X86/X86FastISel.cpp:2182
@@ +2181,3 @@
+    MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+                  TII.get(TargetOpcode::COPY), ResultReg);
+    MIB.addReg(InputReg, RegState::Kill);
----------------
EXTRACT_SUBREG here I believe.

================
Comment at: test/CodeGen/X86/fast-isel-float-half-convertion.ll:7
@@ +6,3 @@
+entry:
+  %0 = call i16 @llvm.convert.to.fp16.f32(float %a)
+  ret i16 %0
----------------
Could you add tests with doubles?

I may be wrong but I thought the intrinsic allows any floating type.

http://reviews.llvm.org/D7673

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