[PATCH] R600/SI: Extend private extload pattern to include zext loads

[Matt Arsenault]

On 02/13/2015 05:51 PM, Tom Stellard wrote:
> On Fri, Feb 13, 2015 at 03:59:50PM -0800, Matt Arsenault wrote:
>>> On Feb 13, 2015, at 10:52 AM, Tom Stellard <thomas.stellard at amd.com> wrote:
>>>
>>> ---
>>> lib/Target/R600/AMDGPUInstructions.td | 10 +++++---
>>> test/CodeGen/R600/extload-private.ll  | 46 +++++++++++++++++++++++++++++++++++
>>> 2 files changed, 52 insertions(+), 4 deletions(-)
>>> create mode 100644 test/CodeGen/R600/extload-private.ll
>>>
>>> diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td
>>> index 12b494e..aa61d73 100644
>>> --- a/lib/Target/R600/AMDGPUInstructions.td
>>> +++ b/lib/Target/R600/AMDGPUInstructions.td
>>> @@ -164,10 +164,6 @@ class PrivateStore <SDPatternOperator op> : PrivateMemOp <
>>>    (ops node:$value, node:$ptr), (op node:$value, node:$ptr)
>>>> ;
>>> -def extloadi8_private : PrivateLoad <extloadi8>;
>>> -def sextloadi8_private : PrivateLoad <sextloadi8>;
>>> -def extloadi16_private : PrivateLoad <extloadi16>;
>>> -def sextloadi16_private : PrivateLoad <sextloadi16>;
>>> def load_private : PrivateLoad <load>;
>>>
>>> def truncstorei8_private : PrivateStore <truncstorei8>;
>>> @@ -231,6 +227,9 @@ def sextloadi8_local : PatFrag<(ops node:$ptr), (sextloadi8 node:$ptr), [{
>>>      return isLocalLoad(dyn_cast<LoadSDNode>(N));
>>> }]>;
>>>
>>> +def extloadi8_private : PrivateLoad <az_extloadi8>;
>>> +def sextloadi8_private : PrivateLoad <sextloadi8>;
>>> +
>>> def az_extloadi16 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
>>>    return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
>>> }]>;
>>> @@ -267,6 +266,9 @@ def sextloadi16_local : PatFrag<(ops node:$ptr), (sextloadi16 node:$ptr), [{
>>>      return isLocalLoad(dyn_cast<LoadSDNode>(N));
>>> }]>;
>>>
>>> +def extloadi16_private : PrivateLoad <az_extloadi16>;
>>> +def sextloadi16_private : PrivateLoad <sextloadi16>;
>>> +
>>> def az_extloadi32 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
>>>    return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
>>> }]>;
>>> diff --git a/test/CodeGen/R600/extload-private.ll b/test/CodeGen/R600/extload-private.ll
>>> new file mode 100644
>>> index 0000000..4991eab
>>> --- /dev/null
>>> +++ b/test/CodeGen/R600/extload-private.ll
>>> @@ -0,0 +1,46 @@
>>> +; RUN: llc < %s -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
>>> +; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
>>> +
>>> +; FUNC-Label: {{^}}load_i8_sext_private:
>> The -Labels are broken
>>
> Here is an updated patch.
>
> -Tom


LGTM

>>> +; SI: buffer_load_sbyte v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
>>> +define void @load_i8_sext_private(i32 addrspace(1)* %out) {
>>> +entry:
>>> +  %tmp0 = alloca i8
>>> +  %tmp1 = load i8* %tmp0
>>> +  %tmp2 = sext i8 %tmp1 to i32
>>> +  store i32 %tmp2, i32 addrspace(1)* %out
>>> +  ret void
>>> +}
>>> +
>>> +; FUNC-Label: {{^}}load_i8_zext_private:
>>> +; SI: buffer_load_ubyte v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
>>> +define void @load_i8_zext_private(i32 addrspace(1)* %out) {
>>> +entry:
>>> +  %tmp0 = alloca i8
>>> +  %tmp1 = load i8* %tmp0
>>> +  %tmp2 = zext i8 %tmp1 to i32
>>> +  store i32 %tmp2, i32 addrspace(1)* %out
>>> +  ret void
>>> +}
>>> +
>>> +; FUNC-Label: {{^}}load_i16_sext_private:
>>> +; SI: buffer_load_sshort v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
>>> +define void @load_i16_sext_private(i32 addrspace(1)* %out) {
>>> +entry:
>>> +  %tmp0 = alloca i16
>>> +  %tmp1 = load i16* %tmp0
>>> +  %tmp2 = sext i16 %tmp1 to i32
>>> +  store i32 %tmp2, i32 addrspace(1)* %out
>>> +  ret void
>>> +}
>>> +
>>> +; FUNC-Label: {{^}}load_i16_zext_private:
>>> +; SI: buffer_load_ushort v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
>>> +define void @load_i16_zext_private(i32 addrspace(1)* %out) {
>>> +entry:
>>> +  %tmp0 = alloca i16
>>> +  %tmp1 = load i16* %tmp0
>>> +  %tmp2 = zext i16 %tmp1 to i32
>>> +  store i32 %tmp2, i32 addrspace(1)* %out
>>> +  ret void
>>> +}
>>> -- 
>>> 2.0.4
>>>
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