[PATCH] [X86] Try to combine vector anyext + and into a vector zext
Andrea Di Biagio
Andrea_DiBiagio at sn.scee.net
Mon Feb 16 05:06:15 PST 2015
Hi Michael,
Overall the change looks good to me. There are a couple of things that could be improved (see comments below).
In the description, you mentioned that this rule would help simplifying a (type-)legalized dag node sequence obtained from a vector zext. It probably makes sense to guard this new rule against `DCI.isBeforeLegalize()`. If the level is 'BeforeLegalizeTypes' then we probably don't want/need to enable this new rule.
Minor question: what about moving this logic into a separate function? I don't have a strong opinion about it, so feel free to keep the code in 'PerformAndCombine' if you think it makes more sense.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24668-24669
@@ +24667,4 @@
+ N0.getOperand(0).getOpcode() == ISD::VECTOR_SHUFFLE &&
+ (N1.getOpcode() == ISD::BUILD_VECTOR ||
+ N1.getOpcode() == ISD::BITCAST)) {
+
----------------
I think you can remove these two checks.
Your algorithm already checks (between line 24682 and 24686) that N1 is a build_vector or a bitcast of a build_vector.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24691
@@ +24690,3 @@
+ bool HasAnyUndefs;
+ BuildVectorSDNode *Vector = dyn_cast<BuildVectorSDNode>(Splat);
+ if (!Vector->isConstantSplat(SplatValue, SplatUndef,
----------------
You don't need a dyn_cast here. Node Splat can only be an ISD::BUILD_VECTOR at this point.
I think you can safely use a 'cast' here.
http://reviews.llvm.org/D7666
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