[llvm] r229313 - Added some test cases of missed opportunities to use unpckl/unpckh shuffles
Hal Finkel
hfinkel at anl.gov
Sun Feb 15 07:28:44 PST 2015
----- Original Message -----
> From: "Simon Pilgrim" <llvm-dev at redking.me.uk>
> To: llvm-commits at cs.uiuc.edu
> Sent: Sunday, February 15, 2015 9:07:45 AM
> Subject: [llvm] r229313 - Added some test cases of missed opportunities to use unpckl/unpckh shuffles
>
> Author: rksimon
> Date: Sun Feb 15 09:07:45 2015
> New Revision: 229313
>
> URL: http://llvm.org/viewvc/llvm-project?rev=229313&view=rev
> Log:
> Added some test cases of missed opportunities to use unpckl/unpckh
> shuffles
Shouldn't there be some FIXME comments in the test cases? I prefer that we have some in test cases that represent could-be-improved behavior, as opposed to behavior we're attempting to keep.
-Hal
>
> Modified:
> llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll
> llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
> llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll
>
> Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll?rev=229313&r1=229312&r2=229313&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll Sun Feb 15
> 09:07:45 2015
> @@ -808,6 +808,22 @@ define <4 x float> @shuffle_v4f32_0zz3(<
> ret <4 x float> %shuffle
> }
>
> +define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float>
> %b) {
> +; SSE-LABEL: shuffle_v4f32_u051:
> +; SSE: # BB#0:
> +; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
> +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
> +; SSE-NEXT: retq
> +;
> +; AVX-LABEL: shuffle_v4f32_u051:
> +; AVX: # BB#0:
> +; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
> +; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
> +; AVX-NEXT: retq
> + %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32>
> <i32 undef, i32 0, i32 5, i32 1>
> + ret <4 x float> %shuffle
> +}
> +
> define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
> ; SSE2-LABEL: shuffle_v4i32_4zzz:
> ; SSE2: # BB#0:
> @@ -1133,6 +1149,23 @@ define <4 x i32> @shuffle_v4i32_2345(<4
> ret <4 x i32> %shuffle
> }
>
> +define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
> +; SSE-LABEL: shuffle_v4i32_40u1:
> +; SSE: # BB#0:
> +; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
> +; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[2,1]
> +; SSE-NEXT: movaps %xmm1, %xmm0
> +; SSE-NEXT: retq
> +;
> +; AVX-LABEL: shuffle_v4i32_40u1:
> +; AVX: # BB#0:
> +; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
> +; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[2,1]
> +; AVX-NEXT: retq
> + %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32>
> <i32 4, i32 0, i32 undef, i32 1>
> + ret <4 x i32> %shuffle
> +}
> +
> define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
> ; SSE2-LABEL: shuffle_v4i32_3456:
> ; SSE2: # BB#0:
>
> Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll?rev=229313&r1=229312&r2=229313&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll Sun Feb 15
> 09:07:45 2015
> @@ -357,6 +357,15 @@ define <4 x double> @shuffle_v4f64_0415(
> ret <4 x double> %shuffle
> }
>
> +define <4 x double> @shuffle_v4f64_u062(<4 x double> %a, <4 x
> double> %b) {
> +; ALL-LABEL: shuffle_v4f64_u062:
> +; ALL: # BB#0:
> +; ALL-NEXT: vshufpd {{.*#+}} ymm0 =
> ymm1[0],ymm0[0],ymm1[2],ymm0[2]
> +; ALL-NEXT: retq
> + %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x
> i32> <i32 undef, i32 0, i32 6, i32 2>
> + ret <4 x double> %shuffle
> +}
> +
> define <4 x i64> @shuffle_v4i64_0000(<4 x i64> %a, <4 x i64> %b) {
> ; AVX1-LABEL: shuffle_v4i64_0000:
> ; AVX1: # BB#0:
> @@ -775,6 +784,21 @@ define <4 x i64> @shuffle_v4i64_5zuz(<4
> ret <4 x i64> %shuffle
> }
>
> +define <4 x i64> @shuffle_v4i64_40u2(<4 x i64> %a, <4 x i64> %b) {
> +; AVX1-LABEL: shuffle_v4i64_40u2:
> +; AVX1: # BB#0:
> +; AVX1-NEXT: vshufpd {{.*#+}} ymm0 =
> ymm1[0],ymm0[0],ymm1[2],ymm0[2]
> +; AVX1-NEXT: retq
> +;
> +; AVX2-LABEL: shuffle_v4i64_40u2:
> +; AVX2: # BB#0:
> +; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5]
> +; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3,4,5,6,7]
> +; AVX2-NEXT: retq
> + %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
> <i32 4, i32 0, i32 undef, i32 2>
> + ret <4 x i64> %shuffle
> +}
> +
> define <4 x i64> @stress_test1(<4 x i64> %a, <4 x i64> %b) {
> ; ALL-LABEL: stress_test1:
> ; ALL: retq
>
> Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll?rev=229313&r1=229312&r2=229313&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll Sun Feb 15
> 09:07:45 2015
> @@ -792,6 +792,16 @@ define <8 x float> @shuffle_v8f32_ba9832
> ret <8 x float> %shuffle
> }
>
> +define <8 x float> @shuffle_v8f32_80u1b4uu(<8 x float> %a, <8 x
> float> %b) {
> +; ALL-LABEL: shuffle_v8f32_80u1b4uu:
> +; ALL: # BB#0:
> +; ALL-NEXT: vshufps {{.*#+}} ymm1 =
> ymm1[0,0],ymm0[0,0],ymm1[4,4],ymm0[4,4]
> +; ALL-NEXT: vshufps {{.*#+}} ymm0 =
> ymm1[0,2],ymm0[2,1],ymm1[4,6],ymm0[6,5]
> +; ALL-NEXT: retq
> + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32>
> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32
> undef>
> + ret <8 x float> %shuffle
> +}
> +
> define <8 x i32> @shuffle_v8i32_00000000(<8 x i32> %a, <8 x i32> %b)
> {
> ; AVX1-LABEL: shuffle_v8i32_00000000:
> ; AVX1: # BB#0:
> @@ -1846,6 +1856,22 @@ define <8 x i32> @shuffle_v8i32_9ubzdefz
> ret <8 x i32> %shuffle
> }
>
> +define <8 x i32> @shuffle_v8i32_80u1b4uu(<8 x i32> %a, <8 x i32> %b)
> {
> +; AVX1-LABEL: shuffle_v8i32_80u1b4uu:
> +; AVX1: # BB#0:
> +; AVX1-NEXT: vshufps {{.*#+}} ymm1 =
> ymm1[0,0],ymm0[0,0],ymm1[4,4],ymm0[4,4]
> +; AVX1-NEXT: vshufps {{.*#+}} ymm0 =
> ymm1[0,2],ymm0[2,1],ymm1[4,6],ymm0[6,5]
> +; AVX1-NEXT: retq
> +;
> +; AVX2-LABEL: shuffle_v8i32_80u1b4uu:
> +; AVX2: # BB#0:
> +; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,0,2,1,4,4,6,5]
> +; AVX2-NEXT: vpblendd {{.*#+}} ymm0 =
> ymm1[0],ymm0[1,2,3],ymm1[4],ymm0[5,6,7]
> +; AVX2-NEXT: retq
> + %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32>
> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32
> undef>
> + ret <8 x i32> %shuffle
> +}
> +
> define <8 x float> @splat_mem_v8f32_2(float* %p) {
> ; ALL-LABEL: splat_mem_v8f32_2:
> ; ALL: # BB#0:
>
>
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--
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory
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