[PATCH] [X86][AVX2] vpslldq/vpsrldq byte shifts for AVX2

[Craig Topper]

No need to fix the AVX1 handling first. I was just making sure it was on your radar. I'd like to see this patch go in so we can remove more of the intrinsics.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:7811
@@ +7810,3 @@
+    for (int l = 0; l < NumElts; l += NumLaneElts) {
+      for (int i = 0; i < Shift; i++)
+        MatchLeft &= Zeroable[l + i];
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llvm style is usually ++i on loop iterators. Same with a couple of the other loops.

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Comment at: lib/Target/X86/X86ISelLowering.cpp:7821
@@ +7820,3 @@
+    for (int l = 0; l < NumElts; l += NumLaneElts) {
+      for (int i = 0; i < NumLaneElts; i += Scale) {
+        unsigned Pos = MatchLeft ? Shift + l : l;
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Am I missing where the inner loop iterator is used or what it's repeating?

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Comment at: lib/Target/X86/X86ISelLowering.cpp:7837
@@ +7836,3 @@
+    V = DAG.getNode(Op, DL, ShiftVT, V,
+                    DAG.getConstant(ByteShift * 8, MVT::i8));
+    return DAG.getNode(ISD::BITCAST, DL, VT, V);
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Can we avoid the multiply by 8 and just use the Shift value directly? Of course the patterns would also need to be fixed to just use the immediate directly instead of BYTE_imm.

http://reviews.llvm.org/D7596

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