[llvm] r229226 - R600/SI: Fix copies from SGPR to VCC

[Matt Arsenault]

Author: arsenm
Date: Fri Feb 13 20:55:56 2015
New Revision: 229226

URL: http://llvm.org/viewvc/llvm-project?rev=229226&view=rev
Log:
R600/SI: Fix copies from SGPR to VCC

This shows up without optimizations when vcc is required
to be used.

Modified:
    llvm/trunk/lib/Target/R600/SIInstrInfo.cpp

Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.cpp?rev=229226&r1=229225&r2=229226&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.cpp Fri Feb 13 20:55:56 2015
@@ -333,12 +333,17 @@ SIInstrInfo::copyPhysReg(MachineBasicBlo
 
   } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
     if (DestReg == AMDGPU::VCC) {
-      // FIXME: Hack until VReg_1 removed.
+      if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
+        BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
+          .addReg(SrcReg, getKillRegState(KillSrc));
+      } else {
+        // FIXME: Hack until VReg_1 removed.
+        assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
+        BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
+          .addImm(0)
+          .addReg(SrcReg, getKillRegState(KillSrc));
+      }
 
-      assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
-      BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
-        .addImm(0)
-        .addReg(SrcReg, getKillRegState(KillSrc));
       return;
     }