[PATCH] Optimize unrolled reductions in LoopStrengthReduce

Hal Finkel hfinkel at anl.gov
Tue Feb 10 13:39:49 PST 2015


----- Original Message -----
> From: "Quentin Colombet" <qcolombet at apple.com>
> To: "Eric Christopher" <echristo at gmail.com>
> Cc: reviews+D7128+public+3a2510f20967c21a at reviews.llvm.org, ohsallen at us.ibm.com, hfinkel at anl.gov,
> llvm-commits at cs.uiuc.edu
> Sent: Tuesday, February 10, 2015 3:32:26 PM
> Subject: Re: [PATCH] Optimize unrolled reductions in LoopStrengthReduce
> 
> On Feb 10, 2015, at 1:22 PM, Eric Christopher < echristo at gmail.com >
> wrote:
> 
> Cautious is fine, but adding more register pressure heuristics to the
> middle end just gets us to a point where everything is poorly done
> via heuristics.
> 
> 
> What do you think would be the right metric to control this
> optimization?
> My inclination right now was to use the same, if possible, heuristic
> as the vectorizer, which IIRC, uses some register pressure
> heuristic.
> 
> I am not saying this is good, I am saying that like every unrolling
> technic we need to find a good balance between code size explosion
> and performance improvements. Exposing too much ILP is probably not
> a good idea.
> 

It would be nice to be able to do these transformations in the backend where we can really measure register pressure and instruction latencies; unfortunately, right now, we lack the right infrastructure for that -- and I think it is not obvious how to add it either (it's like having ScalarEvolution that operates at the MI level, plus some version of the SEExpander that locally re-runs the instruction selector).

Our current register-pressure heuristic in the vectorizer is also not terrific (especially because it considers everything to belong to one big register class with not enough registers), but improving that seems much easier than the alternatives.

 -Hal

> 
> -Quentin
> 
> 
> 
> 
> 
> 
> -eric
> 
> On Tue Feb 10 2015 at 11:02:04 AM Quentin Colombet <
> qcolombet at apple.com > wrote:
> 
> 
> > FWIW I'm not such a huge fan of using register pressure heuristics
> > in the middle end
> 
> 
> FWIW, I agree, but this is not what LSR currently does and since the
> backends do not expect that yet, I would prefer moving with
> cautious.
> 
> Q.
> 
> 
> http://reviews.llvm.org/D7128
> 
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-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory



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