[PATCH] [PowerPC] Implement miscellaneous vector logical operations introduced in POWER8

[hfinkel at anl.gov]

In http://reviews.llvm.org/D7469#119824, @wschmidt wrote:

> This LGTM -- could you expand on the FIXME to indicate what we discussed the other day?  I.e., that the patterns should be differentiated by HasVSX and !HasVSX so that uses of AddedComplexity are minimized?


LGTM too. My hope is that if we disable competing Altivec patterns when VSX is enabled (thus allowing the VSX patterns to be selected, which reduces register pressure), then we won't need the added complexity for the VSX patterns at all. Another option might be to treat the added complexity for VSX patterns in a more principled way (adding only 1 or 2 under the theory that using VSX over Altivec could save one or two extra copies from the register allocator).


http://reviews.llvm.org/D7469

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