[llvm] r228270 - Add addrspacecast node to tablegen
Matt Arsenault
Matthew.Arsenault at amd.com
Wed Feb 4 19:35:34 PST 2015
Author: arsenm
Date: Wed Feb 4 21:35:34 2015
New Revision: 228270
URL: http://llvm.org/viewvc/llvm-project?rev=228270&view=rev
Log:
Add addrspacecast node to tablegen
The node is still defined oddly so that the
address spaces are not operands and not accessible
from tablegen, but as-is this can now be used to write
a ComplexPattern with an addrspacecast root node.
Modified:
llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=228270&r1=228269&r2=228270&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original)
+++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Wed Feb 4 21:35:34 2015
@@ -371,6 +371,7 @@ def zext : SDNode<"ISD::ZERO_EXTEN
def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>;
def bitconvert : SDNode<"ISD::BITCAST" , SDTUnaryOp>;
+def addrspacecast : SDNode<"ISD::ADDRSPACECAST", SDTUnaryOp>;
def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>;
def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>;
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